SNLS648B February   2019  – October 2023 TUSB2E22

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
  8. Parametric Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 USB 2.0
      2. 8.3.2 eUSB2
      3. 8.3.3 Cross MUX
    4. 8.4 Device Functional Modes
      1. 8.4.1 Repeater Mode
      2. 8.4.2 Power Down Mode
      3. 8.4.3 CROSS
  10. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Dual Port System Implementation
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power Up Reset
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Example YCG Layout For Application With No Cross MUX Function.
      3. 9.4.3 Example RZA Layout For Application With No Cross MUX Function
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RZA|20
  • YCG|25
Thermal pad, mechanical data (Package|Pins)
Orderable Information

CROSS

CROSS pin will control the orientation of the integrated cross bar mux.

Upon de-assertion of RESETB followed by internally generated reset signal and 1ms delay, CROSS pin is sampled and latched.

The system needs to make sure that CROSS meets t_su_CROSS and t_hd_CROSS with respect to power supply ramp and RESETB de-assertion per Section 9.3.

Changes to the state of the CROSS input while RESETB is high will be ignored.

Table 8-2 eUSB2 to USB Mapping
CROSS = 0CROSS = 1
eUSB0 (eDP0, eDN0)USBA (DPA, DNA)USBB (DPB, DNB)
eUSB1 (eDP1, eDN1)USBB (DPB, DNB)USBA (DPA, DNA)