SNLS648B February   2019  – October 2023 TUSB2E22

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
  8. 7 Parametric Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 USB 2.0
      2. 8.3.2 eUSB2
      3. 8.3.3 Cross MUX
    4. 8.4 Device Functional Modes
      1. 8.4.1 Repeater Mode
      2. 8.4.2 Power Down Mode
      3. 8.4.3 CROSS
  10. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Dual Port System Implementation
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power Up Reset
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Example YCG Layout For Application With No Cross MUX Function.
      3. 9.4.3 Example RZA Layout For Application With No Cross MUX Function
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RZA|20
  • YCG|25
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.1 Power Up Reset

RESETB pin is active low reset pin and can also be used as a power down pin.

TUSB2E22 does not have power supply sequence requirements between VDD3V3 and VDD1V8.

Maximum VDD3V3 and VDD1V8 ramp time to reach minimum supply voltages should be 2 ms.

Internal power on reset circuit along with the external RESETB input pin allows for proper initialization when RESETB is de-asserted high prior to the power rails being valid. If RESETB de-assert high before the power supplies are stable, internal power on reset circuit will hold off internal reset until the supplies are stable.

Upon de-assertion of RESETB followed by internally generated reset signal and 1ms delay, CROSS pin is sampled and latched.

Upon de-assertion of RESETB and after t_RH_READY, TUSB2E22 will enable and enter default state and be ready to accept eUSB2 packets. Each repeater will either be in host repeater mode or device repeater mode depending on the receipt of either host mode enable or peripheral mode enable.