SLUS334F August   1995  – August 2022 UC1823A , UC1825A , UC2823A , UC2823B , UC2825A , UC2825B , UC3823A , UC3823B , UC3825A , UC3825B

PRODUCTION DATA  

  1. 1Features
  2. 2Description
  3. 3Revision History
  4. 4Ordering Information
  5. 5Pin Configuration and Functions
    1.     Terminal Functions
  6. 6Specifications
    1. 6.1 ABSOLUTE MAXIMUM RATINGS
    2. 6.2 Thermal Information
    3. 6.3 ELECTRICAL CHARACTERISTICS
    4. 6.4 ELECTRICAL CHARACTERISTICS
  7. 7Application and Implementation
    1. 7.1 LEADING EDGE BLANKING
    2. 7.2 UVLO, SOFT-START AND FAULT MANAGEMENT
    3. 7.3 ACTIVE LOW OUTPUTS DURING UVLO
    4. 7.4 CONTROL METHODS
    5. 7.5 SYNCHRONIZATION
    6. 7.6 HIGH CURRENT OUTPUTS
    7. 7.7 GROUND PLANES
    8. 7.8 OPEN LOOP TEST CIRCUIT
  8. 8Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • J|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

UVLO, SOFT-START AND FAULT MANAGEMENT

Soft-start is programmed by a capacitor on the SS pin. At power up, SS is discharged. When SS is low, the error amplifier output is also forced low. While the internal 9-μA source charges the SS pin, the error amplifier output follows until closed loop regulation takes over.

Anytime ILIM exceeds 1.2 V, the fault latch is set and the output pins are driven low. The soft-start cap is then discharged by a 250-μA current sink. No more output pulses are allowed until soft-start is fully discharged and ILIM is below 1.2 V. At this point the fault latch resets and the chip executes a soft-start.

Should the fault latch get set during soft-start, the outputs are immediately terminated, but the soft-start capacitor does not discharge until it has been fully charged first. This results in a controlled hiccup interval for continuous fault conditions.

GUID-2B5F60BC-7FFB-4043-96CD-0670AFDECD69-low.gifFigure 7-2 Soft-Start and Fault Waveforms