SLUSDD4B April   2019  – December 2020 UC1843B-SP


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 UVLO
      2. 7.3.2 Reference
      3. 7.3.3 Totem-Pole Output
    4. 7.4 Device Functional Modes
  8. Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. Switching Frequency
        2. Transformer
        3. RCD Diode Clamp
        4. Output Diode
        5. Output Filter and Capacitor
        6. Compensation
        7. Sense Resistor and Slope Compensation
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Feedback Traces
      2. 10.1.2 Input/Output Capacitors
      3. 10.1.3 Compensation Components
      4. 10.1.4 Traces and Ground Planes
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information


The poles and zeros of a flyback converter can be found with the following equations:

Equation 36. fZESR=1+D2π×Cout×RESR
Equation 37. fZESR=1+0.52π×1146 μF×0.009 Ω=23.15 kHz
Equation 38. fP=12π×Cout×Ro
Equation 39. fP=12π×1146 μF×0.5=278 Hz
Equation 40. fRHPZ=Rout×(1-DMAX)22π×LPRINps2×DMAX
Equation 41. fRHPZ=0.5×(1-0.5)22π×21 μH3.332×0.5=21 kHz
Equation 42. fCompensation Zero=12π×RCOMP×CCOMP=12π×5.11 kΩ×0.22 μF=142 Hz
Equation 43. fCompensation Pole=12π×RCOMP×CHF=12π×5.11 kΩ×1500 pF=20.76 kHz

Type IIB compensation was selected to compensate the poles and zeros of the flyback converter for the design. Since the right half plane zero (RHPZ) of the flyback converter is unable to be compensated, the crossover frequency of the converter should be between one fourth to a whole decade below the RHPZ of the converter. Type IIB compensation has 1 pole and 1 zero to help compensate the converter. The pole from the compensation is suggested to be placed by the RHPZ of the converter and the zero from compensation is suggested to be placed a decade before the expected crossover frequency. Using these guidelines the compensation values for the converter were picked for the converter. For the non-isolated portion of the board this means choosing the value of the compensation resistors and capacitors along these guidelines. Increasing or decreasing the gain of the design can be compensated for by dividing the resistor from compensation down and increasing the values of the capacitors by the same amount. This allows for the gain to be controlled in the system without changing the poles and zeros of the system. Optimization is needed for compensation values, and those values can be validated through testing.