SGLS384B May   2008  – October 2024 UC2843A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1.     Pin Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Pulse-by-Pulse Current Limiting
      2. 6.3.2 Current Sense Circuit
      3. 6.3.3 Error Amplifier Configuration
      4. 6.3.4 Undervoltage Lockout
      5. 6.3.5 Oscillator
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Undervoltage Lockout (UVLO) Start-Up
      3. 6.4.3 UVLO Turnoff Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
      2. 10.1.2 Device Nomenclature
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Related Links
    4. 10.4 Receiving Notification of Documentation Updates
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

Unless otherwise stated, these specifications apply for TA = –40°C to 125°C (UC2843A-Q1); TA = TJ; VCC = 15 V(1); RT = 10 kΩ; CT = 3.3 nF.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
REFERENCE
Output voltage TJ = 25°C, IO = 1 mA 4.95 5 5.05 V
Line regulation 12 ≤ VIN ≤ 25 V 6 20 mV
Load regulation 1 ≤ IO ≤ 20 mA 6 25 mV
Temperature stability(2) 0.2 0.4 mV/°C
Total output variation Line, Load, Temperature 4.9 5.1 V
Output noise voltage(7) 10 Hz ≤ f ≤ 10 kHz; TJ = 25°C 50 µV
Long-term stability(7) TA = 125°C, 1000 hrs 5 25 mV
Output short circuit –30 –100 –180 mA
OSCILLATOR
Initial accuracy TJ = 25°C 47 52 57 kHz
Voltage stability 12 ≤ VCC ≤ 25 V 0.2 1 %
Temperature stability(7) TMIN ≤ TA ≤ TMAX 5 %
Amplitude(7) VRT/CT (pin 4) peak to peak 1.7 V
Discharge current(4) TJ = 25°C, VRT/CT = 2 V 7.8 8.3 8.8 mA
VRT/CT = 2 V 7.5 8.8
ERROR AMPLIFIER
Input voltage VCOMP = 2.5 V 2.45 2.5 2.55 V
Input bias current –0.3 –1 µA
AVOL Open-loop gain 2 ≤ VO ≤ 4 V 65 90 dB
Unity gain bandwidth(7) TJ = 25°C 0.7 1 MHz
CMRR Common mode rejection ratio 12 ≤ VCC ≤ 25 V 60 70 dB
Output sink current VFB = 2.7 V, VCOMP = 1.1 V 2 6 mA
Output source current VFB = 2.3 V, VCOMP = 5 V –0.5 –0.8 mA
VOUT high VFB = 2.3 V, RL = 15 kΩ to ground 5 6 V
VOUT low VFB = 2.7 V, RL = 15 kΩ to VREF 0.7 1.1 V
CURRENT SENSE
Gain(5)(6) 2.85 3 3.15 V/V
Maximum input signal(5) VCOMP = 5 V 0.9 1 1.1 V
PSRR Power supply rejection ratio(5) 12 ≤ VCC ≤ 25 V 70 dB
Input bias current –2 –10 µA
Delay to output(7) VISENSE = 0 to 2 V 150 300 ns
OUTPUT
Output low level ISINK = 20 mA 0.1 0.4 V
ISINK = 200 mA 1.5 2.2
Output high level ISOURCE = 20 mA 13 13.5 V
ISOURCE = 200 mA 12 13.5
Rise time(7) TJ = 25°C, CL = 1 nF 25 150 ns
Fall time(7) TJ = 25°C, CL = 1 nF 25 150 ns
UVLO saturation VCC = 5 V, ISINK = 10 mA 0.7 1.2 V
UNDERVOLTAGE LOCKOUT
Start threshold 7.8 8.4 9 V
Minimum operation voltage after turnon 7 7.6 8.2 V
PWM
Maximum duty cycle 92 96 100 %
Minimum duty cycle 0 %
TOTAL STANDBY CURRENT
Start-up current 0.3 0.5 mA
Operating supply current VFB = VISENSE = 0 V 11 17 mA
VCC Zener voltage ICC = 25 mA 30 39 V