SLUSD78A February   2019  – May 2019 UCC21750

ADVANCE INFORMATION for pre-production products; subject to change without notice.  

  1. Features
  2. Applications
  3. Description
    1.     Simplified Block Diagram
  4. Revision History
    1.     Device Images
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
  7. Parameter Measurement Information
    1. 7.1 Propagation Delay
      1. 7.1.1 Regular Turn-OFF
    2. 7.2 Input Deglitch Filter
    3. 7.3 Active Miller Clamp
      1. 7.3.1 Internal On-chip Active Miller Clamp
    4. 7.4 Under Voltage Lockout (UVLO)
      1. 7.4.1 VCC UVLO
      2. 7.4.2 VDD UVLO
    5. 7.5 Desaturation (DESAT) Protection
      1. 7.5.1 DESAT Protection with Soft Turn-OFF
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power Supply
      2. 8.3.2  Driver Stage
      3. 8.3.3  VCC and VDD Undervoltage Lockout (UVLO)
      4. 8.3.4  Active Pulldown
      5. 8.3.5  Short Circuit Clamping
      6. 8.3.6  Active Miller Clamp
      7. 8.3.7  Overcurrent and Short Circuit Protection
      8. 8.3.8  Soft Turn-off
      9. 8.3.9  Fault (FLT, Reset and Enable (RST/EN)
      10. 8.3.10 Isolated Analog to PWM Signal Function
    4. 8.4 Device Functional Modes
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input filters for IN+, IN- and RST/EN
        2. 9.2.2.2 Turn on and turn off gate resistors
        3. 9.2.2.3 Overcurrent and Short Circuit Protection
        4. 9.2.2.4 Isolated Analog Signal Sensing
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resource
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Single channel SiC/IGBT isolated gate driver
  • SiC MOSFETs and IGBTs up to 1700 V
  • 33-V maximum output drive voltage (VDD-COM)
  • Split outputs with ±10-A peak drive current
  • 150-V/ns min. CMTI
  • DESAT – monitor VCE, VDS while PWM is ON
    • Response time: 200ns
  • Active miller clamp
    • 4-A internal active miller clamp
  • Soft turn-off when fault happen
    • Soft turn-off 400 mA
  • Isolated analog sensor with PWM output for
    • Temperature sense with NTC or thermal diode
    • High voltage DC-link or phase voltage
  • Alarm FLT on over current and reset from RST/EN
  • Fast enable/disable response on RST/EN
  • Reject noise transient and pulse on input pins
    • UVLO with power good on RDY
      • VDD UVLO 12 V
    • Inputs/outputs with over/under-shoot immunity
    • Small propagation delay and pulse/part skew
    • Operating temperature range –40°C to 125°C
    • Safety-related certifications (planned):
      • 8000-VPK VIOTM and 2121-VPK VIORM Reinforced Isolation per DIN V VDE V 0884-11 (VDE V 0884-11): 2017-01
      • 5700-VRMS Isolation for 1 Minute per UL1577