SLUSEW3 October   2023 UCC27332-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD Power On Reset
      2. 7.3.2 Input Stage
      3. 7.3.3 Enable Function
      4. 7.3.4 Output Stage
    4. 7.4 Device Functional Modes
  9. 8  Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Driving MOSFET
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Input-to-Output Configuration
          2. 8.2.1.2.2 Input Threshold Type
          3. 8.2.1.2.3 VDD Bias Supply Voltage
          4. 8.2.1.2.4 Peak Source and Sink Currents
          5. 8.2.1.2.5 Enable and Disable Function
          6. 8.2.1.2.6 Propagation Delay and Minimum Input Pulse Width
          7. 8.2.1.2.7 Power Dissipation
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Thermal Consideration
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The UCC27332-Q1 is a single channel, high-speed, low-side gate driver capable of effectively driving MOSFET and GaN power switches. UCC27332-Q1 has a typical peak drive strength of 9-A, which reduces the rise and fall times of the power switches, lowering switching losses and increasing efficiency. The UCC27332-Q1 device's small propagation delay yields better power stage efficiency by improving the dead time optimization, pulse width utilization, control loop response, and transient performance of the system.

UCC27332-Q1 can handle –5-V on its input, which improves robustness in systems with moderate ground bouncing. An independent enable signal allows the power stage to be controlled independent of the main control logic. The gate driver can quickly shut off the power stage if there is a fault in the system (which requires the power train to be turned-off). The enable function also improves system robustness. Many high-frequency switching power supplies exhibit high frequency noise at the gate of the power device, which can get injected into the output pin of the gate driver and can cause the driver to malfunction. The UCC27332-Q1 performs well in such conditions due to its transient reverse current and reverse voltage capability.

The strong internal pulldown MOSFET holds the output low if the VDD voltage is below the specified power on reset threshold. This active pulldown feature further improves system robustness. The small 3-mm×3mm MSOP package enables optimum gate driver placement and inproved layout. This small package also enables optimum gate driver placement and improved layout.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE (NOM)
UCC27332-Q1 DGN (VSSOP-PowerPAD, 8) 3.0 mm × 4.9 mm 3.0 mm x 3.0 mm
(1) For all available packages, see the orderable addendum at the end of this data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.