SLUSDW0B May   2020  – May 2020 UCC28065

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Principles of Operation
      2. 8.3.2  Natural Interleaving
      3. 8.3.3  On-Time Control, Maximum Frequency Limiting, Restart Timer and Input Voltage Feed-Forward compensation
      4. 8.3.4  Zero-Current Detection and Valley Switching
      5. 8.3.5  Phase Management and Light-Load Operation
      6. 8.3.6  Burst Mode Operation
      7. 8.3.7  External Disable
      8. 8.3.8  Improved Error Amplifier
      9. 8.3.9  Soft Start
      10. 8.3.10 Brownout Protection
      11. 8.3.11 Line Dropout Detection
      12. 8.3.12 VREF
      13. 8.3.13 VCC
      14. 8.3.14 System Level Protections
        1. 8.3.14.1 Failsafe OVP - Output Over-voltage Protection
        2. 8.3.14.2 Overcurrent Protection
        3. 8.3.14.3 Open-Loop Protection
        4. 8.3.14.4 VCC Undervoltage Lock-Out (UVLO) Protection
        5. 8.3.14.5 Phase-Fail Protection
        6. 8.3.14.6 CS - Open, TSET - Open and Short Protection
        7. 8.3.14.7 Thermal Shutdown Protection
        8. 8.3.14.8 Fault Logic Diagram
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Inductor Selection
        2. 9.2.2.2  ZCD Resistor Selection RZA, RZB
        3. 9.2.2.3  HVSEN
        4. 9.2.2.4  Output Capacitor Selection
        5. 9.2.2.5  Selecting RS For Peak Current Limiting
        6. 9.2.2.6  Power Semiconductor Selection (Q1, Q2, D1, D2)
        7. 9.2.2.7  Brownout Protection
        8. 9.2.2.8  Converter Timing
        9. 9.2.2.9  Programming VOUT
        10. 9.2.2.10 Voltage Loop Compensation
      3. 9.2.3 Application Curves
        1. 9.2.3.1 Input Ripple Current Cancellation with Natural Interleaving
        2. 9.2.3.2 Brownout Protection
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Package Option Addendum
      1. 13.1.1 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2.6 Power Semiconductor Selection (Q1, Q2, D1, D2)

The selection of Q1, Q2, D1, and D2 are based on the power requirements of the design. For an explanation of how to select power semiconductor components for transition-mode PFC preregulators, refer to UCC38050 100-W Critical Conduction Power Factor Corrected (PFC) Pre-regulator.

The MOSFET (Q1, Q2) pulsed-drain maximum current is shown in Equation 38:

Equation 38. UCC28065 qu41_lusao7.gif

The MOSFET (Q1, Q2) RMS current calculation is shown in Equation 39:

Equation 39. UCC28065 qu42_lusao7.gif

To meet the power requirements of the design, IRFB11N50A 500-V MOSFETs were chosen for Q1 and Q2.

The boost diode (D1, D2) RMS current is shown in Equation 40:

Equation 40. UCC28065 qu43_lusao7.gif

To meet the power requirements of the design, MURS360T3, 600-V diodes were chosen for D1 and D2.