SLUS270H March   1999  – April 2025 UCC1801 , UCC1802 , UCC1803 , UCC1804 , UCC1805 , UCC2800 , UCC2801 , UCC2802 , UCC2803 , UCC2804 , UCC2805 , UCC3800 , UCC3801 , UCC3802 , UCC3803 , UCC3804 , UCC3805

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Detailed Pin Description
        1. 7.3.1.1 COMP
        2. 7.3.1.2 FB
        3. 7.3.1.3 CS
        4. 7.3.1.4 RC
        5. 7.3.1.5 GND
        6. 7.3.1.6 OUT
        7. 7.3.1.7 VCC
        8. 7.3.1.8 Pin 8 (REF)
      2. 7.3.2  Undervoltage Lockout (UVLO)
      3. 7.3.3  Self-Biasing, Active Low Output
      4. 7.3.4  Reference Voltage
      5. 7.3.5  Oscillator
      6. 7.3.6  Synchronization
      7. 7.3.7  PWM Generator
      8. 7.3.8  Minimum Off-Time Setting (Dead-Time Control)
      9. 7.3.9  Leading Edge Blanking
      10. 7.3.10 Minimum Pulse Width
      11. 7.3.11 Current Limiting
      12. 7.3.12 Overcurrent Protection and Full Cycle Restart
      13. 7.3.13 Soft Start
      14. 7.3.14 Slope Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 UVLO Mode
      3. 7.4.3 Soft Start Mode
      4. 7.4.4 Fault Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Sensing Network
        2. 8.2.2.2 Gate Drive Resistor
        3. 8.2.2.3 Vref Capacitor
        4. 8.2.2.4 RTCT
        5. 8.2.2.5 Start-Up Circuit
        6. 8.2.2.6 Voltage Feedback Compensation
          1. 8.2.2.6.1 Power Stage Gain, Zeroes, and Poles
          2. 8.2.2.6.2 Compensation Loop
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Related Links
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.9 Leading Edge Blanking

A 100-ns leading edge blanking interval is applied to the current sense input circuitry of the UCC280x devices. This internal feature has been incorporated to eliminate the requirement for an external resistor-capacitor filter network to suppress the switching spike associated with turnon of the power MOSFET. This 100-ns period must be adequate for most switch-mode designs but can be lengthened by adding an external R/C filter. Note that the 100-ns leading edge blanking is also applied to the cycle-by-cycle current limiting function in addition to the overcurrent fault comparator.

UCC1801 UCC1802 UCC1803 UCC1804 UCC1805 UCC2800 UCC2801 UCC2802 UCC2803 UCC2804 UCC2805 UCC3800 UCC3801 UCC3802 UCC3803 UCC3804 UCC3805 Current Sense Filter Required With Older PWM ICsFigure 7-13 Current Sense Filter Required With Older PWM ICs
UCC1801 UCC1802 UCC1803 UCC1804 UCC1805 UCC2800 UCC2801 UCC2802 UCC2803 UCC2804 UCC2805 UCC3800 UCC3801 UCC3802 UCC3803 UCC3804 UCC3805 Current Sense Waveforms With Leading Edge BlankingFigure 7-14 Current Sense Waveforms With Leading Edge Blanking