SBOS395D October   2007  – September 2015 VCA820

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: VS = ±5 V
    6. 7.6  Typical Characteristics: VS = ±5 V, DC Parameters
    7. 7.7  Typical Characteristics: VS = ±5 V, DC and Power-Supply Parameters
    8. 7.8  Typical Characteristics: VS = ±5 V, AVMAX = 6 dB
    9. 7.9  Typical Characteristics: VS = ±5 V, AVMAX = 20 dB
    10. 7.10 Typical Characteristics: VS = ±5 V, AVMAX = 40 dB
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Maximum Gain of Operation
      2. 8.4.2 Output Current and Voltage
      3. 8.4.3 Input Voltage Dynamic Range
      4. 8.4.4 Output Voltage Dynamic Range
      5. 8.4.5 Bandwidth
      6. 8.4.6 Offset Adjustment
      7. 8.4.7 Noise
      8. 8.4.8 Input and ESD Protection
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Design-In Tools
        1. 9.1.1.1 Demonstration Boards
        2. 9.1.1.2 Macromodels and Applications Support
      2. 9.1.2 Operating Suggestions
        1. 9.1.2.1 Package Considerations
    2. 9.2 Typical Applications
      1. 9.2.1 Wideband Variable Gain Amplifier Operation
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Difference Amplifier
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
      3. 9.2.3 Differential Equalizer
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
      4. 9.2.4 Differential Cable Equalizer
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curve
      5. 9.2.5 AGC Loop
        1. 9.2.5.1 Design Requirements
        2. 9.2.5.2 Detailed Design Procedure
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier such as the VCA820 requires careful attention to printed circuit board (PCB) layout parasitics and external component types. Recommendations to optimize performance include:

  • Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. This recommendation includes the ground pin (pin 2). Parasitic capacitance on the output can cause instability: on both the inverting input and the noninverting input, it can react with the source impedance to cause unintentional band limiting. To reduce unwanted capacitance, a window around the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes should be unbroken elsewhere on the board. Place a small series resistance (greater than 25 Ω) with the input pin connected to ground to help decouple package parasitics.
  • Minimize the distance (less than 0.25”) from the power-supply pins to high-frequency 0.1-μF decoupling capacitors. At the device pins, the ground and power plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections should always be decoupled with these capacitors. Larger (2.2 μF to 6.8 μF) decoupling capacitors, effective at lower frequencies, should also be used on the main supply pins. These capacitors may be placed somewhat farther from the device and may be shared among several devices in the same area of the PCB.
  • Careful selection and placement of external components preserve the high-frequency performance of the VCA820. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal-film and carbon composition, axially-leaded resistors can also provide good high-frequency performance. Again, keep the leads and PCB trace length as short as possible. Never use wire-wound type resistors in a high-frequency application. Because the output pin is the most sensitive to parasitic capacitance, always position the series output resistor, if any, as close as possible to the output pin. Other network components, such as inverting or non-inverting input termination resistors, should also be placed close to the package.
  • Connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50 mils to 100 mils, or 1.27 mm to 2.54 mm) should be used, preferably with ground and power planes opened up around them.
  • Socketing a high-speed part like the VCA820 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network, which can make it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the VCA820 onto the board.

11.2 Layout Example

VCA820 layout_sbos395.png Figure 89. VCA820 Recommended Layout

11.3 Thermal Considerations

The VCA820 does not require heatsinking or airflow in most applications. The maximum desired junction temperature sets the maximum allowed internal power dissipation as described in this section. In no case should the maximum junction temperature be allowed to exceed +150°C.

Operating junction temperature (TJ) is given by Equation 6:

Equation 6. VCA820 q_tj_bos395.gif

The total internal power dissipation (PD) is the sum of quiescent power (PDQ) and additional power dissipated in the output stage (PDL) to deliver load power. Quiescent power is simply the specified no-load supply current times the total supply voltage across the part. PDL depends on the required output signal and load; for a grounded resistive load, however, it is at a maximum when the output is fixed at a voltage equal to one-half of either supply voltage (for equal bipolar supplies). Under this worst-case condition, PDL = VS2/(4 × RL), where RL is the resistive load.

Note that it is the power in the output stage and not in the load that determines internal power dissipation. As a worst-case example, compute the maximum TJ using a VCA820ID (SO-14 package) in the circuit of Figure 76 operating at maximum gain and at the maximum specified ambient temperature of +85°C with a DC output voltage at half the supply into a 100-ohm load.

Equation 7. VCA820 q_pd_bos395.gif
Equation 8. VCA820 q_max_tj_bos395.gif

This maximum operating junction temperature is well below most system level targets. Most applications should be lower because an absolute worst-case output stage power was assumed in this calculation of VCC/2, which is beyond the output voltage range for the VCA820.