SBASA81 January   2023 ADS9817

ADVANCE INFORMATION  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Inputs
        1. 7.3.1.1 Programmable Gain Amplifier (PGA)
        2. 7.3.1.2 Input Clamp Protection Circuit
        3. 7.3.1.3 Wide-Common-Mode Voltage Rejection Circuit
        4. 7.3.1.4 Programmable Low-Pass Filter
        5. 7.3.1.5 Gain Error Calibration
      2. 7.3.2 ADC Transfer Function
      3. 7.3.3 ADC Sampling Clock Input
      4. 7.3.4 Reference
        1. 7.3.4.1 Internal Reference Voltage
        2. 7.3.4.2 External Reference Voltage
      5. 7.3.5 Test Patterns for Data Interface
        1. 7.3.5.1 User-Defined Test Pattern
        2. 7.3.5.2 User-Defined Alternating Test Pattern
        3. 7.3.5.3 Ramp Test Pattern
    4. 7.4 Programming
      1. 7.4.1 Register Write
      2. 7.4.2 Register Read
      3. 7.4.3 Multiple Devices: Daisy-Chain Topology for SPI Configuration
        1. 7.4.3.1 Register Write With Daisy-Chain
        2. 7.4.3.2 Register Read With Daisy-Chain
    5. 7.5 Register Map
      1. 7.5.1 Register Bank 0
      2. 7.5.2 Register Bank 1
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Data Acquisition (DAQ) System
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 CMOS Data Interface
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • 8-channel, 18-bit ADC with analog front-end:
    • Dual, simultaneous sampling: 4 × 1 channels
    • Constant 1-MΩ input impedance front-end
  • Programmable low-pass filter bandwidth:
    • 21 kHz and 400 kHz
  • Programmable input ranges:
    • ±12 V, ±10 V, ±7 V, ±5 V, ±3.5 V, and ±2.5 V
    • Single-ended and differential inputs
  • Input overvoltage protection: Up to ±18 V
  • Integrated low-drift 4.096-V precision reference
  • Excellent performance:
    • DNL: ±0.3 LSB, INL: ±1.5 LSB
    • SNR: 92.2 dB, THD: –112 dB
  • Power supply:
    • Analog and digital: 5 V and 1.8 V
    • Digital interface: 1.2 V to 1.8 V
  • Temperature range: –40°C to +125°C
Device Block Diagram