SLLSEW1 December 2016 ISO5852S-EP
The ISO5852S-EP device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15-V to maximum 30-V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.
An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 μs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2 potential which turns the IGBT immediately off.
When desaturation is active, a fault signal is sent across the isolation barrier pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.
|PART NUMBER||PACKAGE||BODY SIZE (NOM)|
|ISO5852S-EP||SOIC (16)||10.30 mm × 7.50 mm|
|December 2016||*||Initial release.|