The ISO5852S-EP device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15-V to maximum 30-V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.
An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 µs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2 potential which turns the IGBT immediately off.
When desaturation is active, a fault signal is sent across the isolation barrier pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.
When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.
The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.
The ISO5852S-EP device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –55°C to +125°C ambient.
| Type | Title | Date | |
|---|---|---|---|
| * | Data sheet | ISO5852S-EP High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features datasheet | 23 Dec 2016 |
| * | Radiation & reliability report | ISO5852SMDWREP Reliability Report | 20 Apr 2017 |
| Application note | External Gate Resistor Selection Guide (Rev. A) | 28 Feb 2020 | |
| Application note | Understanding Peak IOH and IOL Currents (Rev. A) | 28 Feb 2020 | |
| Application note | Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting | 26 Feb 2020 | |
| Technical article | How to achieve higher system robustness in DC drives, part 3: minimum input pulse | 19 Sep 2018 | |
| Technical article | How to achieve higher system robustness in DC drives, part 2: interlock and deadtime | 30 May 2018 | |
| Technical article | Boosting efficiency for your solar inverter designs | 24 May 2018 | |
| Technical article | How to achieve higher system robustness in DC drives, part 1: negative voltage | 17 Apr 2018 |
For additional terms or required resources, click any title below to view the detail page where available.
This evaluation module, featuring ISO5852S reinforced isolated gate driver device, allows designers to evaluate device AC and DC performance with a pre-populated 1-nF load or with a user-installed IGBT in either of the standard TO-247 or TO-220 packages.
| Package | Pins | Download |
|---|---|---|
| SOIC (DW) | 16 | View options |
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