JAJSHX5F October   2010  – September 2019 ADS1118

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      K タイプの熱電対測定 内蔵温度センサによる冷接点補償
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements: Serial Interface
    7. 8.7 Switching Characteristics: Serial Interface
    8. 8.8 Typical Characteristics
  9. 9 Parameter Measurement Information
    1. 9.1 Noise Performance
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Multiplexer
      2. 10.3.2 Analog Inputs
      3. 10.3.3 Full-Scale Range (FSR) and LSB Size
      4. 10.3.4 Voltage Reference
      5. 10.3.5 Oscillator
      6. 10.3.6 Temperature Sensor
        1. 10.3.6.1 Converting from Temperature to Digital Codes
        2. 10.3.6.2 Converting from Digital Codes to Temperature
    4. 10.4 Device Functional Modes
      1. 10.4.1 Reset and Power Up
      2. 10.4.2 Operating Modes
        1. 10.4.2.1 Single-Shot Mode and Power-Down
        2. 10.4.2.2 Continuous-Conversion Mode
      3. 10.4.3 Duty Cycling for Low Power
    5. 10.5 Programming
      1. 10.5.1 Serial Interface
      2. 10.5.2 Chip Select (CS)
      3. 10.5.3 Serial Clock (SCLK)
      4. 10.5.4 Data Input (DIN)
      5. 10.5.5 Data Output and Data Ready (DOUT/DRDY)
      6. 10.5.6 Data Format
      7. 10.5.7 Data Retrieval
        1. 10.5.7.1 32-Bit Data Transmission Cycle
        2. 10.5.7.2 16-Bit Data Transmission Cycle
    6. 10.6 Register Maps
      1. 10.6.1 Conversion Register [reset = 0000h]
        1. Table 6. Conversion Register Field Descriptions
      2. 10.6.2 Config Register [reset = 058Bh]
        1. Table 7. Config Register Field Descriptions
  11. 11Application and Implementation
    1. 11.1 Application Information
      1. 11.1.1 Serial Interface Connections
      2. 11.1.2 GPIO Ports for Communication
      3. 11.1.3 Analog Input Filtering
      4. 11.1.4 Single-Ended Inputs
      5. 11.1.5 Connecting Multiple Devices
      6. 11.1.6 Pseudo Code Example
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
    1. 12.1 Power-Supply Sequencing
    2. 12.2 Power-Supply Decoupling
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14デバイスおよびドキュメントのサポート
    1. 14.1 ドキュメントのサポート
      1. 14.1.1 関連資料
    2. 14.2 ドキュメントの更新通知を受け取る方法
    3. 14.3 コミュニティ・リソース
    4. 14.4 商標
    5. 14.5 静電気放電に関する注意事項
    6. 14.6 Glossary
  15. 15メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10.3.3 Full-Scale Range (FSR) and LSB Size

A programmable gain amplifier (PGA) is implemented before the ADS1118 ΔΣ core. The full-scale range is configured by three bits (PGA[2:0]) in the Config Register and can be set to ±6.144 V, ±4.096 V, ±2.048 V, ±1.024 V, ±0.512 V, ±0.256 V. Table 3 shows the FSR together with the corresponding LSB size. LSB size is calculated from full-scale voltage by the formula shown in Equation 4. However, analog input voltages may never exceed the analog input voltage limits given in the Electrical Characteristics. If a supply voltage of VDD greater than 4 V is used, the ±6.144 V full-scale range allows input voltages to extend up to the supply. Note though that in this case, or whenever the supply voltage is less than the full-scale range (for example, VDD = 3.3 V and full-scale range = ±4.096 V), a full-scale ADC output code cannot be obtained. This inability means that some dynamic range is lost.

Equation 4. LSB = FSR / 216

Table 3. Full-Scale Range and Corresponding LSB Size

FSR LSB SIZE
±6.144 V(1) 187.5 μV
±4.096 V(1) 125 μV
±2.048 V 62.5 μV
±1.024 V 31.25 μV
±0.512 V 15.625 μV
±0.256 V 7.8125 μV
(1) This parameter expresses the full-scale range of the ADC scaling. No more than VDD + 0.3 V must be applied to this device.