JAJSS68 November   2023 AM625SIP

ADVANCE INFORMATION  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
    1. 3.1 機能ブロック図
  5. Device Comparison
    1. 4.1 Related Products
  6. Terminal Configuration and Functions
    1. 5.1 Pin Diagrams
    2. 5.2 Pin Attributes and Signal Descriptions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Operating Performance Points
    5. 6.5 Thermal Resistance Characteristics
      1. 6.5.1 Thermal Resistance Characteristics for AMK Package
    6. 6.6 Timing and Switching Characteristics
      1. 6.6.1 Power Supply Requirements
        1. 6.6.1.1 Power Supply Sequencing
  8. Applications, Implementation, and Layout
    1. 7.1 Peripheral- and Interface-Specific Design Information
      1. 7.1.1 Integrated LPDDR4 SDRAM Information
  9. Device and Documentation Support
    1. 8.1 Device Nomenclature
      1. 8.1.1 Standard Package Symbolization
      2. 8.1.2 Device Naming Convention
    2. 8.2 Tools and Software
    3. 8.3 Documentation Support
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Packaging Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • AMK|425
サーマルパッド・メカニカル・データ
発注情報

Recommended Operating Conditions

Note: The values defined in the Recommended Operating Conditions table were taken from the integrated LPDDR4 SDRAM datasheet. For additional recommended operating condition details associated with the integrated LPDDR4 SDRAM, see the Integrated Silicon Solution (ISSI®) IS43/46LQ16256B Datasheet
over operating junction temperature range (unless otherwise noted)
SUPPLY NAME DESCRIPTION MIN(1) NOM MAX(1) UNIT
VDDS_MEM_1P1(2) SDRAM IO supply 1.06 1.10 1.17 V
VDDS_MEM_1P8 SDRAM Core supply 1.70 1.80 1.95 V
TJ Operating junction temperature range Industrial –40 95 °C
The voltage at the device ball must never drop below the MIN voltage or rise above the MAX voltage for any amount of time during normal device operation.
VDDS_MEM_1P1 must be sourced from the same power source as VDDS_DDR.