JAJSI84B April   2012  – December 2019 AMC1100

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Insulation Characteristics Curves
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 The AMC1100 in Frequency Inverters
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 The AMC1100 in Energy Metering
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デバイスの項目表記
        1. 11.1.1.1 絶縁の用語集
          1. 11.1.1.1.1 絶縁
          2. 11.1.1.1.2 汚染度
          3. 11.1.1.1.3 設置カテゴリ
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.9 Electrical Characteristics

All minimum and maximum specifications are at TA = –40°C to +105°C and are within the specified voltage range, unless otherwise noted. Typical values are at TA = +25°C, VDD1 = 5 V, and VDD2 = 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
Maximum input voltage before clipping VINP – VINN ±320 mV
Differential input voltage VINP – VINN –250 250 mV
VCM Common-mode operating range –0.16 VDD1 V
VOS Input offset voltage –1.5 ±0.2 1.5 mV
TCVOS Input offset thermal drift –10 ±1.5 10 µV/K
CMRR Common-mode rejection ratio VIN from 0 V to 5 V at 0 Hz 108 dB
VIN from 0 V to 5 V at 50 kHz 95 dB
CIN Input capacitance to GND1 VINP or VINN 3 pF
CIND Differential input capacitance 3.6 pF
RIN Differential input resistance 28 kΩ
Small-signal bandwidth 60 100 kHz
OUTPUT
Nominal gain 8
GERR Gain error Initial, at TA = +25°C –0.5% ±0.05% 0.5%
–1% ±0.05% 1%
TCGERR Gain error thermal drift ±56 ppm/K
Nonlinearity 4.5 V ≤ VDD2 ≤ 5.5 V –0.075% ±0.015% 0.075%
2.7 V ≤ VDD2 ≤ 3.6 V –0.1% ±0.023% 0.1%
Nonlinearity thermal drift 2.4 ppm/K
Output noise VINP = VINN = 0 V 3.1 mVRMS
PSRR Power-supply rejection ratio vs VDD1, 10-kHz ripple 80 dB
vs VDD2, 10-kHz ripple 61 dB
Rise-and-fall time 0.5-V step, 10% to 90% 3.66 6.6 µs
VIN to VOUT signal delay 0.5-V step, 50% to 10%, unfiltered output 1.6 3.3 µs
0.5-V step, 50% to 50%, unfiltered output 3.15 5.6 µs
0.5-V step, 50% to 90%, unfiltered output 5.26 9.9 µs
CMTI Common-mode transient immunity VCM = 1 kV 2.5 3.75 kV/µs
Output common-mode voltage 2.7 V ≤ VDD2 ≤ 3.6 V 1.15 1.29 1.45 V
4.5 V ≤ VDD2 ≤ 5.5 V 2.4 2.55 2.7 V
Short-circuit current 20 mA
ROUT Output resistance 2.5 Ω
POWER SUPPLY
IDD1 High-side supply current 5.4 8 mA
IDD2 Low-side supply current 2.7 V < VDD2 < 3.6 V 3.8 6 mA
4.5 V < VDD2 < 5.5 V 4.4 7 mA
PDD1 High-side power dissipation 27.0 44.0 mW
PDD2 Low-side power dissipation 2.7 V < VDD2 < 3.6 V 11.4 21.6 mW
4.5 V < VDD2 < 5.5 V 22.0 38.5 mW