JAJSPG0 December   2022 BQ34Z100-R2

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Power-On Reset
    6. 6.6  Electrical Characteristics: LDO Regulator
    7. 6.7  Electrical Characteristics: Internal Temperature Sensor Characteristics
    8. 6.8  Electrical Characteristics: Low-Frequency Oscillator
    9. 6.9  Electrical Characteristics: High-Frequency Oscillator
    10. 6.10 Electrical Characteristics: Integrating ADC (Coulomb Counter) Characteristics
    11. 6.11 Electrical Characteristics: ADC (Temperature and Cell Measurement) Characteristics
    12. 6.12 Electrical Characteristics: Data Flash Memory Characteristics
    13. 6.13 Timing Requirements: HDQ Communication
    14. 6.14 Timing Requirements: I2C-Compatible Interface
    15. 6.15 Typical Characteristics
  7. 7 Functional Block Diagram
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Step-by-Step Design Procedure
          1. 8.2.2.1.1 STEP 1: Review and Modify the Data Flash Configuration Data.
          2. 8.2.2.1.2 STEP 2: Review and Modify the Data Flash Configuration Registers.
          3. 8.2.2.1.3 STEP 3: Design and Configure the Voltage Divider.
          4. 8.2.2.1.4 STEP 4: Determine the Sense Resistor Value.
          5. 8.2.2.1.5 STEP 5: Review and Modify the Data Flash Gas Gauging Configuration, Data, and State.
          6. 8.2.2.1.6 STEP 6: Determine and Program the Chemical ID.
          7. 8.2.2.1.7 STEP 7: Calibrate.
          8. 8.2.2.1.8 STEP 8: Run an Optimization Cycle.
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Introduction
      2. 10.1.2 Power Supply Decoupling Capacitor
      3. 10.1.3 Capacitors
      4. 10.1.4 Communication Line Protection Components
    2. 10.2 Layout Example
      1. 10.2.1 Ground System
      2. 10.2.2 Kelvin Connections
      3. 10.2.3 Board Offset Considerations
      4. 10.2.4 ESD Spark Gap
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.13 Timing Requirements: HDQ Communication

TA = –40°C to 85°C, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted)

PARAMETERTEST CONDITIONSMINNOMMAXUNIT
t(CYCH)Cycle time, host to BQ34Z100-R2190μs
t(CYCD)Cycle time, BQ34Z100-R2 to host190205250μs
t(HW1)Host sends 1 to BQ34Z100-R20.550μs
t(DW1)BQ34Z100-R2 sends 1 to host3250μs
t(HW0)Host sends 0 to BQ34Z100-R286145μs
t(DW0)BQ34Z100-R2 sends 0 to host80145μs
t(RSPS)Response time, BQ34Z100-R2 to host190950μs
t(B)Break time190μs
t(BR)Break recovery time40μs
t(RISE)HDQ line rising time to logic 1 (1.2 V)950ns
t(RST)HDQ Reset1.82.2s
GUID-C251FBE4-3260-4A17-A516-DD55DB76502C-low.gifFigure 6-1 Timing Diagrams