The BQ76907 supports passive cell balancing by bypassing the current of a selected cell using either integrated bypass switches between cells or external bypass FET switches. Balancing must be initiated and controlled manually from a host processor. For further details, see the BQ76907 Technical Reference Manual.

Adjacent as well as non-adjacent cells may be balanced. Balancing is controlled via subcommand from the host. When balancing is initiated, the device starts a timer and will begin balancing the specified cells for up to 20 seconds. The timer is reset if a new balancing subcommand is issued. This is included as a precaution, in case the host processor initiated balancing but then stopped communication with the BQ76907, so that balancing would not continue indefinitely. The host can also use the subcommand to disable balancing earlier when desired. When the subcommand is read, it reports a bit mask of which cells are being actively balanced.

The device can be configured to block balancing from being initiated while the pack is in SEALED mode, if balancing is not intended to be utilized. The device can also be configured to disable balancing if the thermistor temperature or die temperature exceed programmable thresholds. The customer should carefully analyze the thermal effect of the balancing on the device in system. Based on the planned ambient temperature of the device during operation and the thermal properties of the package, the maximum power should be calculated that can be dissipated within the device and still ensure operation remains within the recommended operating temperature range. The cell balancing configuration can then be determined such that the device power remains below this level by reducing the number of cells being balanced simultaneously, or by reducing the balancing current of each cell by appropriate selection of the external resistance in series with each cell.

Due to the current that flows into the cell input pins on the BQ76907 while balancing is active, the measurement of cell voltages and evaluation of cell voltage protections by the device is modified during balancing. Balancing is temporarily disabled during the regular measurement loop while cell voltages or the top of stack voltage is being measured by the ADC. This occurs on every measurement loop, and so can result in significant reduction in the average balancing current that flows. In order to help alleviate this, the device includes configuration bits to slow the measurement loop speed when cell balancing is active, which thereby increases the average balancing current. When the measurement loop is slowed, the response time to cell overvoltage or undervoltage conditions is also slowed accordingly.