JAJSNM9C February   1998  – December 2021 CD54HC273 , CD54HCT273 , CD74HC273 , CD74HCT273

PRODUCTION DATA  

  1. 1 特長
  2. 2 説明
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics
  6. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  7. 7 Parameter Measurement Information
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|20
  • DW|20
サーマルパッド・メカニカル・データ
発注情報

5.5 Prerequisite for Switching Characteristics

See Parameter Measurement Information
PARAMETER VCC (V) 25℃ –40℃ to 85℃ –55℃ to 125℃ UNIT
MIN TYP MAX MIN MAX MIN MAX
HC TYPES
fMAX

Maximum clock frequency

 2 6 5 4 MHz
4.5 30 25 20
6 35 29 23
tW

CLR pulse width

2 60 75 90 ns
4.5 12 15 18
6 10 13 15
tW

Clock pulse width

 2 80 100 120 ns
4.5 16 20 24
6 14 17 20
tSU

Set-up time data to clock

 2 60 75 70 ns
4.5 12 15 18
6 10 13 15
tH

Hold time, data to clock

 2 3 3 3 ns
4.5 3 3 3
6 3 3 3
tREM Removal time, CLR to clock 2 50 65 75 ns
4.5 10 13 15
6 9 11 13
HCT TYPES
fMAX

Maximum clock frequency

 4.5 25 20 16 MHz
tw

CLR pulse width

 4.5 12 15 18 ns
tw

Clock pulse width

 4.5 20 25 30 ns
tSU

Set-up time data to clock

 4.5 12 15 18 ns
tH

Hold time, data to clock

 4.5 3 3 3 ns
tREM Removal time, CLR to clock 4.5 10 13 15 ns