The CDCLVC11xx family of devices is a low-jitter and low-skew LVCMOS fan-out buffer solution. For best signal integrity, it is important to match the characteristic impedance of the CDCLVC11xx's output driver with that of the transmission line. Figure 5 and Figure 6 show the proper configuration per configuration for both VDD = 3.3 V and VDD = 2.5 V. TI recommends placing the series resistor close to the driver to minimize signal reflection.
The outputs of the CDCLVC11xx can be disabled by driving the asynchronous output enable pin (1G) low. Unused output can be left floating to reduce overall system component cost. All supply and ground pins must be connected to VDD and GND, respectively.
The CDCLVC11xx operates from supplies between 2.5 V and 3.3 V.