SLPS319C June   2012  – January 2015 CSD18501Q5A

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Trademarks
    2. 6.2 Electrostatic Discharge Caution
    3. 6.3 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q5A Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Opening
    4. 7.4 Q5A Tape and Reel Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
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発注情報

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA 40 V
IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 32 V 1 μA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA 1.4 1.8 2.3 V
RDS(on) Drain-to-Source On-Resistance VGS = 4.5 V, ID = 25 A 3.3 4.3 mΩ
VGS = 10 V, ID = 25 A 2.5 3.2 mΩ
gƒs Transconductance VDS = 20 V, ID = 25 A 118 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VGS = 0 V, VDS = 20 V,
ƒ = 1 MHz		 3200 3840 pF
Coss Output Capacitance 725 870 pF
Crss Reverse Transfer Capacitance 18 23 pF
RG Series Gate Resistance 1.2 2.4 Ω
Qg Gate Charge Total (4.5 V) VDS = 20 V, ID = 25 A 20 24 nC
Qg Gate Charge Total (10 V) 42 50
Qgd Gate Charge Gate-to-Drain 5.9 nC
Qgs Gate Charge Gate-to-Source 8.1 nC
Qg(th) Gate Charge at Vth 5.7 nC
Qoss Output Charge VDS = 20 V, VGS = 0 V 48 nC
td(on) Turn On Delay Time VDS = 20 V, VGS = 10 V,
IDS = 25 A, RG = 0		 4.7 ns
tr Rise Time 10 ns
td(off) Turn Off Delay Time 20 ns
tƒ Fall Time 3.4 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage IDS = 25 A, VGS = 0 V 0.8 1 V
Qrr Reverse Recovery Charge VDS= 20 V, IF = 25 A, di/dt = 300 A/μs 70 nC
trr Reverse Recovery Time 40 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-Case Thermal Resistance(1) 1.0 °C/W
RθJA Junction-to-Ambient Thermal Resistance(1)(2) 50
(1) RθJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inches × 1.5-inches
(3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
M0137-01_LPS198.gif
 Max RθJA = 50°C/W when mounted on 1 inch2 (6.45-cm2) of
2-oz. (0.071-mm thick) Cu.
M0137-02_LPS198.gif
 Max RθJA = 125°C/W when mounted on a minimum pad area of 2-oz.
(0.071-mm thick) Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
graph01_SLPS319C.png
Figure 1. Transient Thermal Impedance
graph02_LPS.png
Figure 2. Saturation Characteristics
graph04_LPS.png
Figure 4. Gate Charge
graph06_LPS.png
Figure 6. Threshold Voltage vs Temperature
graph08_LPS.png
Figure 8. Normalized On-State Resistance vs Temperature
graph10_SLPS319C.png
Figure 10. Maximum Safe Operating Area
graph12_LPS.png
Figure 12. Maximum Drain Current vs Temperature
graph03_LPS.png
Figure 3. Transfer Characteristics
graph05_LPS.png
Figure 5. Capacitance
graph07_LPS.png
Figure 7. On-State Resistance vs Gate-to-Source Voltage
graph09_LPS.png
Figure 9. Typical Diode Forward Voltage
graph11_LPS.png
Figure 11. Single Pulse Unclamped Inductive Switching