JAJSI38C october   2016  – december 2020 DS280MB810

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements – Serial Management Bus Interface
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device Data Path Operation
      2. 8.3.2 AC-coupled Receiver Inputs
      3. 8.3.3 Signal Detect
      4. 8.3.4 2-Stage CTLE
      5. 8.3.5 Driver DC Gain Control
      6. 8.3.6 2x2 Cross-point Switch
      7. 8.3.7 Configurable SMBus Address
    4. 8.4 Device Functional Modes
      1. 8.4.1 SMBus Slave Mode Configuration
      2. 8.4.2 SMBus Master Mode Configuration (EEPROM Self Load)
    5. 8.5 Programming
      1. 8.5.1 Transfer of Data with the SMBus Interface
    6. 8.6 Register Maps
      1. 8.6.1 Register Types: Global, Shared, and Channel
      2. 8.6.2 Global Registers: Channel Selection and ID Information
      3. 8.6.3 Shared Registers
      4. 8.6.4 Channel Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Backplane and Mid-Plane Reach Extension
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 Front-Port Applications
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
        1. 9.2.3.1 Pattern Generator Characteristics
        2. 9.2.3.2 Equalizing Moderate Pre-Channel Loss
        3. 9.2.3.3 Equalizing High Pre-Channel Loss
        4. 9.2.3.4 Equalizing High Pre-Channel Loss and Moderate Post-Channel Loss
    3. 9.3 Initialization Set Up
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
      1. 11.2.1 Stripline Example
      2. 11.2.2 Microstrip Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.6.2 Global Registers: Channel Selection and ID Information

The global registers can be accessed at any time, regardless of whether the shared or channel register set is selected. The DS280MB810 global registers are located at address 0xEF - 0xFF.

Table 8-2 Global Register Map
Addr [HEX]BitDefault [HEX]ModeEEPROMFieldDescription
0xEF0x0CGeneral
70RWNRESERVEDRESERVED
60RWNRESERVEDRESERVED
50RWNRESERVEDRESERVED
40RWNRESERVEDRESERVED
31RNDEVICE_ID_QUAD_CNT[3]TI device ID (quad count). Contains 0x0C.
21RNDEVICE_ID_QUAD_CNT[2]
10RNDEVICE_ID_QUAD_CNT[1]
00RNDEVICE_ID_QUAD_CNT[0]
0xF00x00Version Revision
70RNTYPETI version ID. Contains 0x00.
60RNVERSION[6]
50RNVERSION[5]
40RNVERSION[4]
30RNVERSION[3]
20RNVERSION[2]
10RNVERSION[1]
00RNVERSION[0]
0xF10x42Channel Control
70RNDEVICE_ID[7]TI device ID. Contains 0x42.
61RNDEVICE_ID[6]
50RNDEVICE_ID[5]
40RNDEVICE_ID[4]
30RNDEVICE_ID[3]
20RNDEVICE_ID[2]
11RNDEVICE_ID[1]
00RNDEVICE_ID[0]
0xF30x00Channel Control
70RNCHAN_VERSION[3]TI digital channel version ID. Contains 0x00.
60RNCHAN_VERSION[2]
50RNCHAN_VERSION[1]
40RNCHAN_VERSION[0]
30RNSHARE_VERSION[3]TI digital share version ID. Contains 0x00.
20RNSHARE_VERSION[2]
10RNSHARE_VERSION[1]
00RNSHARE_VERSION[0]
0xFC0x00General
70RWNEN_CH7Select channel 7
60RWNEN_CH6Select channel 6
50RWNEN_CH5Select channel 5
40RWNEN_CH4Select channel 4
30RWNEN_CH3Select channel 3
20RWNEN_CH2Select channel 2
10RWNEN_CH1Select channel 1
00RWNEN_CH0Select channel 0
0xFD0x00
70RWNRESERVEDRESERVED
60RWNRESERVEDRESERVED
50RWNRESERVEDRESERVED
40RWNRESERVEDRESERVED
30RWNRESERVEDRESERVED
20RWNRESERVEDRESERVED
10RWNRESERVEDRESERVED
00RWNRESERVEDRESERVED
0xFE0x03Vendor ID
70RNVENDOR_ID[7]TI vendor ID. Contains 0x03.
60RNVENDOR_ID[6]
50RNVENDOR_ID[5]
40RNVENDOR_ID[4]
30RNVENDOR_ID[3]
20RNVENDOR_ID[2]
11RNVENDOR_ID[1]
01RNVENDOR_ID[0]
0xFF0x10Channel Control
70RWNRESERVEDRESERVED
60RWNRESERVEDRESERVED
50RWNEN_SHARE_Q1Select shared registers for Quad 1 (Channels 4-7).
41RWNEN_SHARE_Q0Select shared registers for Quad 0 (Channels 0-3).
30RWNRESERVEDRESERVED
20RWNRESERVEDRESERVED
10RWNWRITE_ALL_CHAllows customer to write to all channels as if they are the same, but only allows to read back from the channel specified in 0xFC and 0xFD.
Note: EN_CH_SMB must be = 1 or else this function is invalid.
00RWNEN_CH_SMB1: Enables SMBus access to the channels specified in register 0xFC.
0: The shared registers are selected, see 0xFF[5:4].