JAJSIK2B february   2020  – december 2020 ISOW7841A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Description Continued
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics—5-V Input, 5-V Output
    10. 7.10 Supply Current Characteristics—5-V Input, 5-V Output
    11. 7.11 Electrical Characteristics—3.3-V Input, 5-V Output
    12. 7.12 Supply Current Characteristics—3.3-V Input, 5-V Output
    13. 7.13 Electrical Characteristics—5-V Input, 3.3-V Output
    14. 7.14 Supply Current Characteristics—5-V Input, 3.3-V Output
    15. 7.15 Electrical Characteristics—3.3-V Input, 3.3-V Output
    16. 7.16 Supply Current Characteristics—3.3-V Input, 3.3-V Output
    17. 7.17 Switching Characteristics—5-V Input, 5-V Output
    18. 7.18 Switching Characteristics—3.3-V Input, 5-V Output
    19. 7.19 Switching Characteristics—5-V Input, 3.3-V Output
    20. 7.20 Switching Characteristics—3.3-V Input, 3.3-V Output
    21. 7.21 Insulation Characteristics Curves
    22. 7.22 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 9.3.2 Power-Up and Power-Down Behavior
      3. 9.3.3 Current Limit, Thermal Overload Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device I/O Schematics
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
        1. 10.2.3.1 Insulation Lifetime
  12.   Power Supply Recommendations
  13. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  14. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Glossary
  15. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.4 Device Functional Modes

Table 9-2 lists the supply configurations for these devices.

Table 9-2 Supply Configurations
SEL INPUT VCC VISO
Shorted to VISO 5 V 5 V
Shorted to VISO 3.3 V 5 V
Shorted to GND2 or floating 5 V 3.3 V
Shorted to GND2 or floating 3.3 V 3.3 V(1)
(1) The SEL pin has a weak pulldown internally. Therefore for VISO = 3.3 V, the SEL pin should be strongly connected to the GND2 pin in noisy system scenarios.

Table 9-3 lists the functional modes for ISOW7841A-Q1.

Table 9-3 Function Table
INPUT SUPPLY
(VCC)		 INPUT
(INx)		 OUTPUT
(OUTx)		 COMMENTS
PU H H Output channel assumes the logic state of its input
L L
Open Default Default mode(1): When INx is open, the corresponding output channel assumes logic based on default output mode of selected version
PD X Undetermined(2)
(1) In the default condition, the output is high for ISOW7841A-Q1 and low for ISOW7841A-Q1 with the F suffix.
(2) The outputs are in an undetermined state when VCC < 2.1 V.