JAJSAY9L February   2009  – May 2018 LM26420

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      LM26420デュアル降圧DC/DCコンバータ
      2.      LM26420の効率(最高93%)
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: 16-Pin WQFN
    2.     Pin Functions 20-Pin HTSSOP
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings (LM26420X/Y)
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics Per Buck
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Power Good
      3. 7.3.3 Precision Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Overvoltage Protection
      2. 7.4.2 Undervoltage Lockout
      3. 7.4.3 Current Limit
      4. 7.4.4 Thermal Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Programming Output Voltage
      2. 8.1.2 VINC Filtering Components
      3. 8.1.3 Using Precision Enable and Power Good
      4. 8.1.4 Overcurrent Protection
    2. 8.2 Typical Applications
      1. 8.2.1 LM26420X 2.2-MHz, 0.8-V Typical High-Efficiency Application Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Inductor Selection
          3. 8.2.1.2.3 Input Capacitor Selection
          4. 8.2.1.2.4 Output Capacitor
          5. 8.2.1.2.5 Calculating Efficiency and Junction Temperature
        3. 8.2.1.3 Application Curves
      2. 8.2.2 LM26420X 2.2-MHz, 1.8-V Typical High-Efficiency Application Circuit
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 LM26420X 2.2-MHz, 2.5-V Typical High-Efficiency Application Circuit
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
      4. 8.2.4 LM26420Y 550 kHz, 0.8-V Typical High-Efficiency Application Circuit
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
      5. 8.2.5 LM26420Y 550-kHz, 1.8-V Typical High-Efficiency Application Circuit
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
        3. 8.2.5.3 Application Curves
      6. 8.2.6 LM26420Y 550-kHz, 2.5-V Typical High-Efficiency Application Circuit
        1. 8.2.6.1 Design Requirements
        2. 8.2.6.2 Detailed Design Procedure
        3. 8.2.6.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Method 1: Silicon Junction Temperature Determination
      2. 10.3.2 Thermal Shutdown Temperature Determination
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The LM26420 is a constant frequency dual PWM buck synchronous regulator device that can supply two loads at up to 2 A each. The regulator has a preset switching frequency of either 2.2 MHz or 550 kHz. This high frequency allows the LM26420 to operate with small surface mount capacitors and inductors, resulting in a DC/DC converter that requires a minimum amount of board space. The LM26420 is internally compensated, so it is simple to use and requires few external components. The LM26420 uses current-mode control to regulate the output voltage. The following operating description of the LM26420 refers to the Functional Block Diagram, which depicts the functional blocks for one of the two channels, and to the waveforms in Figure 27. The LM26420 supplies a regulated output voltage by switching the internal PMOS and NMOS switches at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal clock. When this pulse goes low, the output control logic turns on the internal PMOS control switch (TOP Switch). During this on-time, the SW pin voltage (VSW) swings up to approximately VIN, and the inductor current (IL) increases with a linear slope. IL is measured by the current sense amplifier, which generates an output proportional to the switch current. The sense signal is summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which is proportional to the difference between the feedback voltage and VREF. When the PWM comparator output goes high, the TOP Switch turns off and the NMOS switch (BOTTOM Switch) turns on after a short delay, which is controlled by the Dead-Time-Control Logic, until the next switching cycle begins. During the top switch off-time, inductor current discharges through the BOTTOM Switch, which forces the SW pin to swing to ground. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage.

LM26420 LM26420_Basic_Operation_of_the_PWM_Comparator.gifFigure 27. LM26420 Basic Operation of the PWM Comparator