SNVS602L March   2009  – June 2016 LM3409 , LM3409-Q1 , LM3409HV , LM3409HV-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Buck Current Regulators
      2. 8.3.2 Controlled Off-Time (COFT) Architecture
        1. 8.3.2.1 Adjustable Peak Current Control
        2. 8.3.2.2 Controlled Off-Time
      3. 8.3.3 Average LED Current
      4. 8.3.4 Inductor Current Ripple
      5. 8.3.5 Switching Frequency
      6. 8.3.6 PWM Dimming Using the EN Pin
      7. 8.3.7 High Voltage Negative BIAS Regulator
      8. 8.3.8 External Parallel FET PWM Dimming
    4. 8.4 Device Functional Modes
      1. 8.4.1 Low-Power Shutdown
      2. 8.4.2 Thermal Shutdown
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Undervoltage Lockout (UVLO)
      2. 9.1.2 Operation Near Dropout
      3. 9.1.3 LED Ripple Current
      4. 9.1.4 Buck Converters without Output Capacitors
      5. 9.1.5 Buck Converters With Output Capacitors
      6. 9.1.6 Output Overvoltage Protection
      7. 9.1.7 Input Capacitors
      8. 9.1.8 P-Channel MOSFET (PFET)
      9. 9.1.9 Re-Circulating Diode
    2. 9.2 Typical Applications
      1. 9.2.1 EN PIN PWM Dimming Application for 10 LEDs
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Nominal Switching Frequency
          2. 9.2.1.2.2  Inductor Ripple Current
          3. 9.2.1.2.3  Average LED Current
          4. 9.2.1.2.4  Output Capacitance
          5. 9.2.1.2.5  Input Capacitance
          6. 9.2.1.2.6  PFET
          7. 9.2.1.2.7  Diode
          8. 9.2.1.2.8  Input UVLO
          9. 9.2.1.2.9  IADJ Connection Method
          10. 9.2.1.2.10 PWM Dimming Method
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Analog Dimming Application for 4 LEDs
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1  Nominal Switching Frequency
          2. 9.2.2.2.2  Inductor Ripple Current
          3. 9.2.2.2.3  Average LED Current
          4. 9.2.2.2.4  Output Capacitance
          5. 9.2.2.2.5  Input Capacitance
          6. 9.2.2.2.6  PFET
          7. 9.2.2.2.7  Diode
          8. 9.2.2.2.8  Input UVLO
          9. 9.2.2.2.9  IADJ Connection Method
          10. 9.2.2.2.10 PWM Dimming Method
        3. 9.2.2.3 Application Curve
      3. 9.2.3 LM3409 Buck Converter Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1  Nominal Switching Frequency
          2. 9.2.3.2.2  Inductor Ripple Current
          3. 9.2.3.2.3  Average LED Current
          4. 9.2.3.2.4  Output Capacitance
          5. 9.2.3.2.5  Input Capacitance
          6. 9.2.3.2.6  PFET
          7. 9.2.3.2.7  Diode
          8. 9.2.3.2.8  Input UVLO
          9. 9.2.3.2.9  IADJ Connection Method
          10. 9.2.3.2.10 PWM Dimming Method
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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8 Detailed Description

8.1 Overview

The LM3409/09HV are P-channel MOSFET (PFET) controllers for step-down (buck) current regulators which are ideal for driving LED loads. They have wide input voltage range allowing for regulation of a variety of LED loads. The high-side differential current sense, with low adjustable threshold voltage, provides an excellent method for regulating output current while maintaining high system efficiency.

The LM3409/09HV uses a Controlled Off-Time (COFT) architecture that allows the converter to be operated in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) with no external control loop compensation, while providing an inherent cycle-by-cycle current limit. The adjustable current sense threshold provides the capability to amplitude (analog) dim the LED current over the full range and the fast output enable/disable function allows for high frequency PWM dimming using no external components.

When designing, the maximum attainable LED current is not internally limited because the LM3409/09HV is a controller. Instead it is a function of the system operating point, component choices, and switching frequency allowing the LM3409/09HV to easily provide constant currents up to 5A. This simple controller contains all the features necessary to implement a high-efficiency versatile LED driver.

8.2 Functional Block Diagram

LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085603.gif

8.3 Feature Description

8.3.1 Buck Current Regulators

The buck regulator is unique among non-isolated topologies due to the direct connection of the inductor to the load during the entire switching cycle. An inductor will control the rate of change of current that flows through it, therefore a direct connection to the load is excellent for current regulation. A buck current regulator, using the LM3409/09HV, is shown in the Application and Implementation section. During the time that the PFET (Q1) is turned on (tON), the input voltage charges up the inductor (L1). When Q1 is turned off (tOFF), the re-circulating diode (D1) becomes forward biased and L1 discharges. During both intervals, the current is supplied to the load keeping the LEDs forward biased. Figure 19 shows the inductor current (iL(t)) waveform for a buck converter operating in CCM.

The average inductor current (IL) is equal to the average output LED current (ILED), therefore if IL is tightly controlled, ILED will be well regulated. As the system changes input voltage or output voltage, duty cycle (D) is varied to regulate IL and ultimately ILED. For any buck regulator, D is simply the conversion ratio divided by the efficiency (η):

Equation 1. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085626.gif
LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085604.gif Figure 19. Ideal CCM Buck Converter Inductor Current iL(t)

8.3.2 Controlled Off-Time (COFT) Architecture

The COFT architecture is used by the LM3409/09HV to control ILED. It is a combination of peak current detection and a one-shot off-timer that varies with output voltage. D is indirectly controlled by changes in both tOFF and tON, which vary depending on the operating point. This creates a variable switching frequency over the entire operating range. This type of hysteretic control eliminates the need for control loop compensation necessary in many switching regulators, simplifying the design process and providing fast transient response.

8.3.2.1 Adjustable Peak Current Control

At the beginning of a switching period, PFET Q1 is turned on and inductor current increases. Once peak current is detected, Q1 is turned off, the diode D1 forward biases, and inductor current decreases. Figure 20 shows how peak current detection is accomplished using the differential voltage signal created as current flows through the current setting resistor (RSNS). The voltage across RSNS (VSNS) is compared to the adjustable current sense threshold (VCST) and Q1 is turned off when VSNS exceeds VCST, providing that tON is greater than the minimum possible tON (typically 115ns).

LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085605.gif Figure 20. Peak Current Control Circuit

There are three different methods to set the current sense threshold (VCST) using the multi-function IADJ pin:

  1. IADJ pin left open: 5 µA internal current source biases the Zener diode and clamps the IADJ pin voltage (VADJ) at 1.24 V causing the maximum threshold voltage:
  2. Equation 2. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085627.gif
  3. External voltage (VADJ) of 0 V to 1.24 V: Apply to the IADJ pin to adjust VCST from 0V to 248mV. If the VADJ voltage is adjustable, analog dimming can be achieved.
  4. External resistor (REXT) placed from IADJ pin to ground: 5 µA current source sets the VADJ voltage and corresponding threshold voltage:
  5. Equation 3. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085628.gif

8.3.2.2 Controlled Off-Time

Once Q1 is turned off, it remains off for a constant time (tOFF) which is preset by an external resistor (ROFF), an external capacitor (COFF), and the output voltage (VO) as shown in Figure 21. Because ILED is tightly regulated, VO will remain nearly constant over widely varying input voltage and temperature yielding a nearly constant tOFF.

LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085606.gif Figure 21. Off-Time Control Circuit

At the start of tOFF, the voltage across COFF (vCOFF(t)) is zero and the capacitor begins charging according to the time constant provided by ROFF and COFF. When vCOFF(t) reaches the off-time threshold (VOFT = 1.24 V), then the off-time is terminated and vCOFF(t) is reset to zero. tOFF is calculated as follows:

Equation 4. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085629.gif

In reality, there is typically 20 pF parasitic capacitance at the off-timer pin in parallel with COFF, which is accounted for in the calculation of tOFF. Also, it should be noted that the tOFF equation has a preceding negative sign because the result of the logarithm should be negative for a properly designed circuit. The resulting tOFF is a positive value as long as VO > 1.24 V. If VO < 1.24 V, the off-timer cannot reach VOFT and an internally limited maximum off-time (typically 300 µs) will occur.

LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085607.gif Figure 22. Exponential Charging Function vCOFF(t)

Although the tOFF equation is non-linear, tOFF is actually very linear in most applications. Ignoring the 20-pF parasitic capacitance at the COFF pin, vCOFF(t) is plotted in Figure 22. The time derivative of vCOFF(t) can be calculated to find a linear approximation to the tOFF equation:

Equation 5. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085630.gif

When tOFF << ROFF x COFF (equivalent to when VO >> 1.24V), the slope of the function is essentially linear and tOFF can be approximated as a current source charging COFF:

Equation 6. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085631.gif

Using the actual tOFF equation, the inductor current ripple (ΔiL-PP) of a buck current regulator operating in CCM is:

Equation 7. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 300856c2.gif

Using the tOFF approximation, the equation is reduced to:

Equation 8. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085635.gif

NOTE

ΔiL-PP is independent of both VIN and VO when in CCM.

The ΔiL-PP approximation only depends on ROFF, COFF, and L1, therefore the ripple is essentially constant over the operating range as long as VO >> 1.24V (when the tOFF approximation is valid). An exception to the tOFF approximation occurs if the IADJ pin is used to analog dim. As the LED/inductor current decreases, the converter will eventually enter DCM and the ripple will decrease with the peak current threshold. The approximation shows how the LM3409/09HV achieves constant ripple over a wide operating range, however tOFF should be calculated using the actual equation first presented.

8.3.3 Average LED Current

For a buck converter, the average LED current is simply the average inductor current.

LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085611.gif Figure 23. Sense Voltage vSNS(t)

Using the COFT architecture, the peak transistor current (IT-MAX) is sensed as shown in Figure 23, which is equal to the peak inductor current (IL-MAX) given by the following equation:

Equation 9. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085636.gif

Because IL-MAX is set using peak current control and ΔiL-PP is set using the controlled off-timer, IL and correspondingly ILED can be calculated as follows:

Equation 10. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085637.gif

The threshold voltage VCST seen by the high-side sense comparator is affected by the comparator’s input offset voltage, which causes an error in the calculation of IL-MAX and ultimately ILED. To mitigate this problem, the polarity of the comparator inputs is swapped every cycle, which causes the actual IL-MAX to alternate between two peak values (IL-MAXH and IL-MAXL), equidistant from the theoretical IL-MAX as shown in Figure 24. ILED remains accurate through this averaging.

LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085612.gif Figure 24. Inductor Current iL(t) Showing IL-MAX Offset

8.3.4 Inductor Current Ripple

Because the LM3409/09HV swaps the polarity of the differential current sense comparator every cycle, a minimum inductor current ripple (ΔiL-PP) is necessary to maintain accurate ILED regulation. Referring to Figure 24, the first tON is terminated at the higher of the two polarity-swapped thresholds (corresponding to IL-MAXH). During the following tOFF, iL decreases until the second tON begins. If tOFF is too short, then as the second tON begins, iL will still be above the lower peak current threshold (corresponding to IL-MAXL) and a minimum tON pulse will follow. This will result in degraded ILED regulation. The minimum inductor current ripple (ΔiL-PP-MIN) should adhere to the following equation to ensure accurate ILED regulation:

Equation 11. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085638.gif

8.3.5 Switching Frequency

The switching frequency is dependent upon the actual operating point (VIN and VO). VO will remain relatively constant for a given application, therefore the switching frequency will vary with VIN (frequency increases as VIN increases). The target switching frequency (fSW) at the nominal operating point is selected based on the tradeoffs between efficiency (better at low frequency) and solution size/cost (smaller at high frequency). The off-time of the LM3409/09HV can be programmed for switching frequencies up to 5 MHz (theoretical limit imposed by minimum tON). In practice, switching frequencies higher than 1MHz may be difficult to obtain due to gate drive limitations, high input voltage, and thermal considerations.

At CCM operating points, fSW is defined as:

Equation 12. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085639.gif

At DCM operating points, fSW is defined as:

Equation 13. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085640.gif

In the CCM equation, it is apparent that the efficiency (η) factors into the switching frequency calculation. Efficiency is hard to estimate and, because switching frequency varies with input voltage, accuracy in setting the nominal switching frequency is not critical. Therefore, a general rule of thumb for the LM3409/09HV is to assume an efficiency between 85% and 100%. When approximating efficiency to target a nominal switching frequency, the following condition must be met:

Equation 14. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 300856f3.gif
LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085614.gif Figure 25. LED Current iLED(t) During EN Pin PWM Dimming

8.3.6 PWM Dimming Using the EN Pin

The enable pin (EN) is a TTL compatible input for PWM dimming of the LED. A logic low (below 0.5V) at EN will disable the internal driver and shut off the current flow to the LED array. While the EN pin is in a logic low state the support circuitry (driver, bandgap, VCC regulator) remains active to minimize the time needed to turn the LED array back on when the EN pin sees a logic high (above 1.74 V).

Figure 25 shows the LED current (iLED(t)) during PWM dimming where duty cycle (DDIM) is the percentage of the dimming period (TDIM) that the PFET is switching. For the remainder of TDIM, the PFET is disabled. The resulting dimmed average LED current (IDIM-LED) is:

Equation 15. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085641.gif

The LED current rise and fall times (which are limited by the slew rate of the inductor as well as the delay from activation of the EN pin to the response of the external PFET) limit the achievable TDIM and DDIM. In general, dimming frequency should be at least one order of magnitude lower than the steady state switching frequency to prevent aliasing. However, for good linear response across the entire dimming range, the dimming frequency may need to be even lower.

8.3.7 High Voltage Negative BIAS Regulator

The LM3409/09HV contains an internal linear regulator where the steady state VCC pin voltage is typically 6.2 V below the voltage at the VIN pin. The VCC pin should be bypassed to the VIN pin with at least 1µF of ceramic capacitance connected as close as possible to the IC.

8.3.8 External Parallel FET PWM Dimming

LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 30085616.gif Figure 26. Ideal LED Current iLED(t) During Parallel FET Dimming

Any buck topology LED driver is a good candidate for parallel FET dimming because high slew rates are achievable, due to the fact that no output capacitance is required. This allows for much higher dimming frequencies than are achievable using the EN pin. When using external parallel FET dimming, a situation can arise where maximum off-time occurs due to a shorted output. To mitigate this situation, a secondary voltage (VDD) should be used as shown in Figure 27.

LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 snvs602_shuntdim2.gif Figure 27. External Parallel FET Dimming Circuit

A small diode is connected in series with the off time resistor calculated for nominal operation from the output, ROFF1. Then connect a small diode from the secondary voltage along with another resistor, ROFF2. The secondary voltage can be any voltage as long as it is greater than 2V. The value of ROFF2 can be calculated using Equation 16.

Equation 16. LM3409 LM3409-Q1 LM3409HV LM3409HV-Q1 snvs602_eq_shunt2.gif

The ideal LED current waveform iLED(t) during parallel FET PWM dimming is very similar to the EN pin PWM dimming shown previously. The LED current does not rise and fall infinitely fast as shown in Figure 26 however with this method, only the speed of the parallel Dim FET ultimately limits the dimming frequency and dimming duty cycle. This allows for much faster PWM dimming than can be attained with the EN pin.

8.4 Device Functional Modes

8.4.1 Low-Power Shutdown

The LM3409/09HV can be placed into a low-power shutdown (typically 110 µA) by grounding the EN terminal (any voltage below 0.5 V) until VCC drops below the VCC UVLO threshold (typically 3.73 V). During normal operation this terminal should be tied to a voltage above 1.74 V and below absolute maximum input voltage rating.

8.4.2 Thermal Shutdown

Internal thermal shutdown circuitry is provided to protect the IC in the event that the maximum junction temperature is exceeded. The threshold for thermal shutdown is 160°C with 15°C of hysteresis (both values typical). During thermal shutdown the PFET and driver are disabled.