JAJSAQ4F January   2007  – May 2021 LM5002

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High Voltage VCC Regulator
      2. 7.3.2 Oscillator
      3. 7.3.3 External Synchronization
      4. 7.3.4 Enable and Standby
      5. 7.3.5 Error Amplifier and PWM Comparator
      6. 7.3.6 Current Amplifier and Slope Compensation
      7. 7.3.7 Power MOSFET
    4. 7.4 Device Functional Modes
      1. 7.4.1 Thermal Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 VIN
      2. 8.1.2 SW PIN
      3. 8.1.3 EN or UVLO Voltage Divider Selection
      4. 8.1.4 Soft Start
    2. 8.2 Typical Applications
      1. 8.2.1 Non-Isolated Flyback Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Switching Frequency
          2. 8.2.1.2.2 Flyback Transformer
          3. 8.2.1.2.3 Peak MOSFET Current
          4. 8.2.1.2.4 Output Capacitance
          5. 8.2.1.2.5 Output Diode Rating
          6. 8.2.1.2.6 Power Stage Analysis
          7. 8.2.1.2.7 Loop Compensation
      2. 8.2.2 Isolated Flyback Regulator
        1. 8.2.2.1 Design Requirements
      3. 8.2.3 Boost Regulator
        1. 8.2.3.1 Design Requirements
      4. 8.2.4 24-V SEPIC Regulator
        1. 8.2.4.1 Design Requirements
      5. 8.2.5 12-V Automotive SEPIC Regulator
        1. 8.2.5.1 Design Requirements
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.1.1 Design Requirements

The non-isolated flyback converter shown in Figure 8-5 uses the internal voltage reference for the regulation setpoint. The output is 5 V at 500 mA while the input voltage can vary from 16 V to 42 V. The switching frequency is set to 250 kHz. An auxiliary winding on transformer (T1) provides 7.5 V to power the LM5002 when the output is in regulation. This disables the internal high-voltage VCC LDO regulator and improves efficiency. The input undervoltage threshold is 13.9 V. The converter can be shut down by driving the EN input below
1.26 V with an open-collector or open-drain transistor. An external synchronizing frequency can be applied to the SYNC input. An optional soft-start circuit is connected to the COMP pin input. When power is applied, the soft-start capacitor (C7) is discharged and limits the voltage applied to the PWM comparator by the internal error amplifier. The internal approximate 5-kΩ COMP pullup resistor charges the soft-start capacitor until regulation is achieved. The VCC pullup resistor (R7) continues to charge C7 so that the soft-start circuit does not affect the compensation network in normal operation. If the output capacitance is small, the soft-start circuit can be adjusted to limit the power-on output voltage overshoot. If the output capacitance is sufficiently large, no soft-start circuit is required because the LM5002 gradually charges the output capacitor by current limiting at approximately 500 mA (ILIM) until regulation is achieved.