JAJSLO9D June   2015  – May 2021 LM53600-Q1 , LM53601-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 System Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Control Scheme
      2. 8.3.2 Soft-Start Function
      3. 8.3.3 Current Limit
      4. 8.3.4 Hiccup Mode
      5. 8.3.5 RESET Function
      6. 8.3.6 Forced PWM Operation
      7. 8.3.7 Auto Mode Operation and IQ_VIN
      8. 8.3.8 SYNC Operation
      9. 8.3.9 Spread Spectrum
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown
      2. 8.4.2 FPWM Operation
      3. 8.4.3 Auto Mode Operation
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Off-Battery 5-V, 1-A Output Automotive Converter with Spread Spectrum
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Input Capacitor Selection
          4. 9.2.1.2.4 FB Voltage Divider for Adjustable Versions
          5. 9.2.1.2.5 RPU - RESET Pull Up Resistor
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Off-Battery 3.3 V, 1 A Output Automotive Converter with Spread Spectrum
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 Do's and Don't's
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Plane Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

GUID-5EA5FDC9-9CED-4889-89AF-48E56D970A1F-low.gifFigure 6-1 DSX Package10-Pin WSONTop View
Table 6-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NO. NAME
1 SW P Regulator switch node. Connect to output inductor.
2 BOOT I High side gate driver upper supply rail. Connect a 100-nF capacitor from SW pin to BOOT. An internal diode charges the capacitor while SW node is low.
3 VCC P Internal 3-V regulator output. Used as supply to internal control circuits. Connect a high quality 1.0-μF capacitor from this pin to AGND for fixed versions or to GND for adjustable versions.
4 FB (Fixed Versions) I/P Fixed version only, this pin serves as feedback for output voltage as well as power source for VCC’s regulator. Connect to output node. Place 10-nF bypass capacitor immediately adjacent to this pin.
FB (ADJ Version) I ADJ version only, this pin serves as feedback for output voltage only. Connect to output through a voltage divider which determines output voltage set point.
5 AGND (Fixed Version) G Fixed versions only, this is the ground to which input signals and FB are compared.
BIAS (ADJ Version) P Power source for VCC’s regulator. Connect to output node. Place 10-nF bypass capacitor immediately adjacent to this pin.
6 RESET O Open drain reset output. Connect to suitable voltage supply through a current limiting pull up resistor. High = regulator OK, Low = regulator fault. Will go low when EN = low. See Detailed Description.
7 EN I Enable input to regulator. High = on, Low = off. Can be connected to Vin. Do not float.
8 VIN I Input supply to regulator. Connect input bypass capacitors directly between this pin and GND.
9 SYNC/MODE I This is a multifunction mode control input which is tolerant of voltages up to input voltage. With a valid synchronization signal at this pin, the device will switch in forced PWM mode at the external clock frequency and synchronize with it at the rising edge of the clock. See the Electrical Characteristics for synchronization signal specifications. With this input tied high, the device will switch at the internal clock frequency in forced PWM mode. With this input tied low, the device will switch at the internal clock frequency in AUTO mode with diode emulation at light load. Spread spectrum is disabled if there is a valid synchronization signal. Do not float.
10 GND G Bypass to VIN immediately adjacent to this pin.
DAP (EXPOSED PAD) Thermal, GND Thermal Connect to ground – The sole function of the DAP interface is the thermal improvement of the device, a direct thermal connection to a ground plane is required. The DAP is not meant as an electrical interconnect. Electrical characteristics are not ensured.
(1) G = Ground, I = Input, O = Output, P = Power