JAJSFL6D April   2016  – June 2018 LMH1226

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ブロック概略図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Recommended SMBus Interface AC Timing Specifications
    7. 6.7 Serial Parallel Interface (SPI) AC Timing Specifications
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Input Configuration Pins
      2. 7.3.2 Input Carrier Detect
      3. 7.3.3 Continuous Time Linear Equalizer (CTLE)
        1. 7.3.3.1 Adaptive PCB Trace Equalizer (IN1±)
      4. 7.3.4 Input-Output Mux Selection
      5. 7.3.5 Clock and Data Recovery (CDR) Reclocker
      6. 7.3.6 Internal Eye Opening Monitor (EOM)
      7. 7.3.7 Output Function Control
      8. 7.3.8 Output Driver Amplitude and De-Emphasis Control
      9. 7.3.9 Status Indicators and Interrupts
        1. 7.3.9.1 LOCK_N (Lock Indicator)
        2. 7.3.9.2 CD_N (Carrier Detect)
        3. 7.3.9.3 INT_N (Interrupt)
    4. 7.4 Device Functional Modes
      1. 7.4.1 System Management Bus (SMBus) Mode
        1. 7.4.1.1 SMBus Read and Write Transactions
          1. 7.4.1.1.1 SMBus Write Operation Format
          2. 7.4.1.1.2 SMBus Read Operation Format
      2. 7.4.2 Serial Peripheral Interface (SPI) Mode
        1. 7.4.2.1 SPI Read and Write Transactions
          1. 7.4.2.1.1 SPI Write Transaction Format
          2. 7.4.2.1.2 SPI Read Transaction Format
        2. 7.4.2.2 SPI Daisy Chain
    5. 7.5 LMH1226 Register Map
      1. 7.5.1 Share Register Page
      2. 7.5.2 CTLE/CDR Register Page
      3. 7.5.3 Drivers Register Page
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 General Guidance for SMPTE and 10 GbE Applications
      2. 8.1.2 LMH1219 and LMH1226 Compatibility
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Recommended VOD and DEM Register Settings
      4. 8.2.4 Application Performance Plots
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 PCB Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5.3 Drivers Register Page

Address Register Name Bit Field Default Type Description
0x00 Reserved 7:0 Reserved 0x08 RW Reserved
0x01 Reserved 7:0 Reserved 0x80 RW Reserved
0x02 Reserved 7:0 Reserved 0x07 RW Reserved
0x03 Reserved 7:0 Reserved 0x3F RW Reserved
0x04 Reserved 7:0 Reserved 0x00 RW Reserved
0x05 Reserved 7:0 Reserved 0x00 RW Reserved
0x06 Reserved 7:0 Reserved 0xA0 RW Reserved
0x07 Reserved 7:0 Reserved 0x24 RW Reserved
0x08 Reserved 7:0 Reserved 0x27 RW Reserved
0x09 Reserved 7:0 Reserved 0x01 RW Reserved
0x0A Reserved 7:0 Reserved 0x05 RW Reserved
0x0B Reserved 7:0 Reserved 0x37 RW Reserved
0x0C Reserved 7:0 Reserved 0x01 RW Reserved
0x0D Reserved 7:0 Reserved 0x25 RW Reserved
0x0E Reserved 7:0 Reserved 0x37 RW Reserved
0x0F Reserved 7:0 Reserved 0x02 RW Reserved
0x10 Reserved 7:0 Reserved 0x0A RW Reserved
0x11 Reserved 7:0 Reserved 0x02 RW Reserved
0x12 Reserved 7:0 Reserved 0x08 RW Reserved
0x13 Reserved 7:0 Reserved 0x04 RW Reserved
0x14 Reserved 7:0 Reserved 0x3C RW Reserved
0x15 Reserved 7:0 Reserved 0x00 RW Reserved
0x16 Reserved 7:0 Reserved 0x00 RW Reserved
0x17 Reserved 7:0 Reserved 0x08 RW Reserved
0x18 Reserved 7:0 Reserved 0x01 RW Reserved
0x19 Reserved 7:0 Reserved 0x08 RW Reserved
0x1A Reserved 7:0 Reserved 0x01 RW Reserved
0x1B Reserved 7:0 Reserved 0xA7 RW Reserved
0x1C Reserved 7:0 Reserved 0x00 RW Reserved
0x1D Reserved 7:0 Reserved 0x00 RW Reserved
0x1E Reserved 7:0 Reserved 0x00 RW Reserved
0x1F Reserved 7:0 Reserved 0x00 RW Reserved
0x20 Reserved 7:0 Reserved 0x00 RW Reserved
0x21 Reserved 7:0 Reserved 0xC0 RW Reserved
0x22 Reserved 7:0 Reserved 0x00 RW Reserved
0x23 Reserved 7:0 Reserved 0x00 RW Reserved
0x24 Reserved 7:0 Reserved 0x00 RW Reserved
0x25 Reserved 7:6 Reserved 0x00 R Reserved
0x26 Reserved 7:0 Reserved 0x05 R Reserved
0x27 Reserved 7:0 Reserved 0x00 RW Reserved
0x28 Reserved 7:0 Reserved 0x00 RW Reserved
0x29 Reserved 7:0 Reserved 0x20 R Reserved
0x2A Reserved 7:0 Reserved 0x40 RW Reserved
0x2B Reserved 7:0 Reserved 0x89 RW Reserved
0x2C Reserved 7:0 Reserved 0x0B RW Reserved
0x2D Reserved 7:0 Reserved 0x20 RW Reserved
0x2E Reserved 7:0 Reserved 0x00 R Reserved
0x2F Reserved 7:0 Reserved 0x00 RW Reserved
0x30 OUT0 Output Control 7 tx0_mute_ov 0x0A RW OUT0 Mute Override Control
0 = Disable OUT0 Mute Override Control
1 = Enable OUT0 Mute Override Control by value in Reg 0x30[6].
6 tx0_mute_val RW 0 = Normal Operation
1 = Mute OUT0 if Reg 0x30[7] = 1
5 tx0_vod_ov RW OUT0 VOD Override Control
0 = VOD settings for OUT0 determined by VOD_DE pin
1 = Override VOD pin settings for OUT0. VOD settings for OUT0 are controlled by Reg 0x30[2:0]
4:3 Reserved RW Reserved
2:0 tx0_vod RW VOD settings with DE = 0 for OUT0 if Reg 0x30[5] = 1. See Figure 9.
0x31 OUT0
De-Emphasis Control		 7 Reserved 0x01 RW Reserved
6 tx0_dem_ov RW OUT0 De-Emphasis Override Control
0 = De-emphasis for OUT0 determined by VOD_DE pin
1 = Override De-emphasis settings for OUT0. De-emphasis settings for OUT0 are controlled by Reg 0x31[2:0]
5 tx0_PD_ov RW OUT0 Power Down Override Control
0 = Disable OUT0 Power Down Override Control
1 = Enable OUT0 Power Down Override Control by value in Reg 0x31[4].
4 tx0_PD RW 0 = Normal Operation
1 = Power Down OUT0 if Reg 0x31[5] = 1
3 Reserved RW Reserved
2:0 tx0_dem RW De-emphasis settings for OUT0 if Reg 0x31[6] = 1. See Figure 10.
0x32 OUT1 Output Control 7 tx1_mute_ov 0x0A RW OUT1 Mute Override Control
0 = Disable OUT1 Mute Override Control
1 = Enable OUT1 Mute Override Control by value in Reg 0x32[6].
6 tx1_mute_val RW 0 = Normal Operation
1 = Mute OUT1 if Reg 0x32[7] = 1
5 tx1_vod_ov RW OUT1 VOD Override Control
0 = VOD settings for OUT1 determined by VOD_DE pin
1 = Override VOD pin settings for OUT1. VOD settings for OUT1 are controlled by Reg 0x32[2:0]
4:3 Reserved RW Reserved
2:0 tx1_vod RW VOD settings with DE = 0 for OUT1 if Reg 0x32[5] = 1. See Figure 9.
0x33 OUT1
De-Emphasis Control		 7 Reserved 0x11 RW Reserved
6 tx1_dem_ov RW OUT1 De-Emphasis Override Control
0 = De-emphasis for OUT1 determined by VOD_DE pin
1 = Override De-emphasis settings for OUT1. De-emphasis settings for OUT1 are controlled by Reg 0x33[2:0]
5 tx1_PD_ov RW OUT1 Power Down Override Control
0 = Disable OUT1 Power Down Override Control
1 = Enable OUT1 Power Down Override Control by value in Reg 0x33[4].
4 tx1_PD RW 0 = Normal Operation
1 = Power Down OUT1 if Reg 0x33[5] = 1
3 Reserved RW Reserved
2:0 tx1_dem RW De-emphasis settings for OUT1 if Reg 0x33[6] = 1. See Figure 10.
0x34 Reserved 7:0 Reserved 0x17 RW Reserved
0x35 Reserved 7:0 Reserved 0x61 RW Reserved
0x36 Reserved 7:0 Reserved 0x02 RW Reserved
0x37 Reserved 7:0 Reserved 0x00 RW Reserved
0x38 Reserved 7:0 Reserved 0x00 RW Reserved
0x39 Reserved 7:0 Reserved 0x00 RW Reserved
0x3A Reserved 7:0 Reserved 0x00 RW Reserved
0x3B Reserved 7:0 Reserved 0x00 RW Reserved
0x3C Reserved 7:0 Reserved 0x00 RW Reserved
0x3D Reserved 7:0 Reserved 0x7F RW Reserved
0x3E Reserved 7:0 Reserved 0x00 RW Reserved
0x3F Reserved 7:0 Reserved 0x00 RW Reserved
0x40 Reserved 7:0 Reserved 0x00 R Reserved
0x41 Reserved 7:0 Reserved 0x00 R Reserved
0x42 Reserved 7:0 Reserved 0x00 R Reserved
0x43 Reserved 7:0 Reserved 0x00 R Reserved
0x44 Reserved 7:0 Reserved 0x00 R Reserved
0x45 Reserved 7:0 Reserved 0x00 R Reserved
0x46 Reserved 7:0 Reserved 0x00 R Reserved
0x47 Reserved 7:0 Reserved 0x00 R Reserved
0x48 Reserved 7:0 Reserved 0x00 R Reserved
0x49 Reserved 7:0 Reserved 0x01 R Reserved
0x4A Reserved 7:0 Reserved 0x00 R Reserved
0x4B Reserved 7:0 Reserved 0x00 R Reserved
0x4C Reserved 7:0 Reserved 0x00 R Reserved
0x4D Reserved 7:0 Reserved 0x00 RW Reserved
0x4E Reserved 7:0 Reserved 0x00 RW Reserved
0x4F Reserved 7:0 Reserved 0x00 RW Reserved
0x50 Reserved 7:0 Reserved 0x00 RW Reserved
0x51 Reserved 7:0 Reserved 0x00 RW Reserved
0x52 Reserved 7:0 Reserved 0x00 RW Reserved
0x53 Reserved 7:0 Reserved 0x00 RW Reserved
0x54 Reserved 7:0 Reserved 0x0F R Reserved