The 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices, using device and SYSREF clocks. SYSREF can be provided using both DC and AC coupling. Not limited to JESD204B applications, each of the 14 outputs can be individually configured as high-performance outputs for traditional clocking systems.
The high performance, combined with features such as the ability to trade off between power or performance, dual VCOs, dynamic digital delay, holdover, and glitchless analog delay, make the LMK0482x family ideal for providing flexible high-performance clocking trees.
|PART NUMBER||VCO0 FREQUENCY||VCO1 FREQUENCY|
|LMK04821||1930 to 2075 MHz||2920 to 3080 MHz
VCO1 Div = ÷2 to ÷8
(÷2 = 1460 to 1540 MHz)
|LMK04826||1840 to 1970 MHz||2440 to 2505 MHz|
|LMK04828||2370 to 2630 MHz||2920 to 3080 MHz|