JAJSNH5B february   2022  – may 2023 LMQ66410 , LMQ66420 , LMQ66430

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 System Characteristics
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Enable, Start-Up, and Shutdown
      2. 8.3.2  Adjustable Switching Frequency (with RT)
      3. 8.3.3  Power-Good Output Operation
      4. 8.3.4  Internal LDO, VCC, and VOUT/FB Input
      5. 8.3.5  Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal)
      6. 8.3.6  Output Voltage Selection
      7. 8.3.7  Spread Spectrum
      8. 8.3.8  Soft Start and Recovery from Dropout
        1. 8.3.8.1 Recovery from Dropout
      9. 8.3.9  Current Limit and Short Circuit
      10. 8.3.10 Thermal Shutdown
      11. 8.3.11 Input Supply Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
        1. 8.4.3.1 CCM Mode
        2. 8.4.3.2 Auto Mode – Light Load Operation
          1. 8.4.3.2.1 Diode Emulation
          2. 8.4.3.2.2 Frequency Reduction
        3. 8.4.3.3 FPWM Mode – Light Load Operation
        4. 8.4.3.4 Minimum On-Time (High Input Voltage) Operation
        5. 8.4.3.5 Dropout
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Synchronous Buck Regulator at 400 kHz
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1  Choosing the Switching Frequency
        2. 9.2.3.2  Setting the Output Voltage
          1. 9.2.3.2.1 VOUT / FB for Adjustable Output
        3. 9.2.3.3  Inductor Selection
        4. 9.2.3.4  Output Capacitor Selection
        5. 9.2.3.5  Input Capacitor Selection
        6. 9.2.3.6  CBOOT
        7. 9.2.3.7  VCC
        8. 9.2.3.8  CFF Selection
        9. 9.2.3.9  External UVLO
        10. 9.2.3.10 Maximum Ambient Temperature
      4. 9.2.4 Application Curves
    3. 9.3 Best Design Practices
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
        1. 9.5.1.1 Ground and Thermal Considerations
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
      2. 10.1.2 Device Nomenclature
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

GUID-20230405-SS0I-N7QM-5NRD-86LFDLKQT36R-low.svg Figure 6-1 RXB 15-Pin (2.6-mm × 2.6-mm) Enhanced HotRod™ QFN Package (Top View)
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
EN/UVLO 1 A Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN. Do not float this pin.
NC 2 No internal connection to device
VIN 3 P Input supply to regulator. Two 22-nF capacitors are connected in series internally from this pin to the PGND pin. Additional high-quality bypass capacitor or capacitors can be added directly to this pin and PGND.
NC 4 Middle point of the two internal series bypass capacitors. Leave this pin floating.
NC 5 Middle point of the two internal series bypass capacitors. Leave this pin floating.
PGND 6 G Power ground terminal. Connect to system ground. Connect to CIN with short, wide traces.
SW 7 P Regulator switch node. Connect to the power inductor.
BOOT 8 P Bootstrap supply voltage for internal high-side driver. A 0.1-µF capacitor is internally connected from this pin to the SW pin.
NC 9 No internal connection to device
VCC 10 A Internal LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for power-good flag. Connect a high-quality 1-µF capacitor from this pin to GND.
VOUT/FB 11 A Fixed output options and adjustable output options are available with the VOUT/FB pin variant. Connect to the output voltage node for fixed VOUT. See VOUT / FB for Adjustable Output for how to select feedback resistor divider values. See Device Comparison Table for more details. The FB function can be used to adjust the output voltage. Connect to tap point of feedback voltage divider. Do not float this pin.
NC 12 No internal connection to device
RT 13 A The switching frequency can be adjusted from 200 kHz to 2.2 MHz by placing an appropriate resistor between this pin and GND. Refer to Section 8.3.2 for more details.Do not float this pin.
PG 14 A Open-drain power-good flag output. Connect to suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. This pin goes low when EN = low. This pin can be open or grounded when not used.
GND/DAP 15 G Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be connected to GND.
A = Analog, P = Power, G = Ground