JAJSBA0Q January   2000  – December 2017 LP2950-N , LP2951-N

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
    1.     LP2951の概略回路図
  3. 概要
    1.     LP2950-Nの概略回路図
  4. 改訂履歴
  5. Voltage Options
  6. Pin Configuration and Functions
    1.     Pin Functions: LP2950-N
    2.     Pin Functions: LP2951-N
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: LP2950-N
    5. 7.5 Thermal Information: LP2951-N
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Fixed Voltage Options and Programmable Voltage Version
      2. 8.3.2 High Accuracy Output Voltage
      3. 8.3.3 Low Dropout Voltage
      4. 8.3.4 Shutdown Mode
      5. 8.3.5 Error Detection Comparator Output
      6. 8.3.6 Internal Protection Circuitry
        1. 8.3.6.1 Short-Circuit Protection (Current Limit)
        2. 8.3.6.2 Thermal Protection
      7. 8.3.7 Enhanced Stability
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with 30 V ≥ VIN > VOUT(TARGET) + 1 V
      2. 8.4.2 Operation with Shutdown Control
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1  1-A Regulator with 1.2-V Dropout
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Output Capacitor Requirements
          2. 9.2.1.2.2 Input Capacitor Requirements
          3. 9.2.1.2.3 Error Detection Comparator Output
          4. 9.2.1.2.4 Programming the Output Voltage (LP2951-N)
          5. 9.2.1.2.5 Reducing Output Noise
        3. 9.2.1.3 Application Curves
      2. 9.2.2  300-mA Regulator with 0.75-V Dropout
      3. 9.2.3  Wide Input Voltage Range Current Limiter
      4. 9.2.4  Low Drift Current Source
      5. 9.2.5  5-V Current Limiter
      6. 9.2.6  Regulator with Early Warning and Auxiliary Output
      7. 9.2.7  Latch Off When Error Flag Occurs
      8. 9.2.8  2-A Low Dropout Regulator
      9. 9.2.9  5-V Regulator with 2.5-V Sleep Function
      10. 9.2.10 Open Circuit Detector for 4 → 20-mA Current Loop
      11. 9.2.11 Regulator with State-of-Charge Indicator
      12. 9.2.12 Low Battery Disconnect
      13. 9.2.13 System Overtemperature Protection Circuit
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 WSON Mounting
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Detailed Design Procedure

At 100-mA loading, the dropout of the LP2950-N/LP2951-N has 600 mV maximum dropout over temperature, thus an 1500-mV headroom is sufficient for operation over both input and output voltage accuracy. The efficiency of the LP2950-N/LP2951-N in this configuration is VOUT / VIN = 76.9%. To achieve the smallest form factor, the TO-92 package is selected. Input and output capacitors are selected in accordance with the Capacitor Recommendation section. Ceramic capacitances of 1 µF for the input and one 2.2-µF capacitors for the output are selected. With an efficiency of 73.3% and a 100-mA maximum load, the internal power dissipation is 150 mW, which corresponds to a 18.9°C junction temperature rise for the TO-92 package. With an 85°C maximum ambient temperature, the junction temperature is at 103.9°C. To minimize noise, a bypass capacitance (CBYPASS) of 0.01-µF is selected between pin 7 to pin 1 for LP2951-N.