JAJSAB5F December   2006  – November 2016 LP38853

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Supply Sequencing
      3. 7.3.3 Reverse Voltage
      4. 7.3.4 Soft-Start
      5. 7.3.5 Setting The Output Voltage
      6. 7.3.6 Enable (EN) Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Input Voltage
      2. 7.4.2 Bias Voltage
      3. 7.4.3 Enable Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
          1. 8.2.2.1.1 Input Capacitor
          2. 8.2.2.1.2 Output Capacitor
          3. 8.2.2.1.3 Bias Capacitor
          4. 8.2.2.1.4 Set The Output Voltage
          5. 8.2.2.1.5 Feed Forward Capacitor, CFF
        2. 8.2.2.2 Power Dissipation and Heat Sinking
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報
  13. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

Unless otherwise specified: VOUT = 0.8 V, VIN = VOUT(NOM) + 1 V, VBIAS = 3 V, VEN = VBIAS, IOUT = 10 mA, CIN = COUT = 10 µF, CBIAS = 1 µF, CSS = open; typical (TYP) limits are for TJ = 25°C only, and minimum (MIN) and maximum (MAX) limits apply over the junction temperature (TJ) range of –40°C to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
PARAMETERTEST CONDITIONSMIN TYPMAXUNIT
VADJ VADJ accuracy VOUT(NOM) + 1 V ≤ VIN ≤ VBIAS ≤ 4.5 V(1)
3 V ≤ VBIAS ≤ 5.5 V, 10 mA ≤ IOUT ≤ 3 A
TJ = 25°C		 492.5 500 507.5 mV
VOUT(NOM) + 1 V ≤ VIN ≤ VBIAS ≤ 4.5 V(1)
3 V ≤ VBIAS ≤ 5.5 V, 10 mA ≤ IOUT ≤ 3 A		 485 515
VOUT(NOM) + 1 V ≤ VIN ≤ VBIAS ≤ 4.5 V(1)
3 V ≤ VBIAS ≤ 5.5 V,
10 mA ≤ IOUT ≤ 3 A,
0°C ≤ TJ ≤ 125°C		 490 500 510
VOUT VOUT range 3 V ≤ VBIAS ≤ 5.5 V 0.8 1.2 V
4.5 V ≤ VBIAS ≤ 5.5 V 0.8 1.8
ΔVOUT/ΔVIN Line regulation, VIN(2) VOUT(NOM) + 1 V ≤ VIN ≤ VBIAS 0.04 %/V
ΔVOUT/ΔVBIAS Line regulation, VBIAS(2) 3 V ≤ VBIAS ≤ 5.5 V 0.1 %/V
ΔVOUT/ΔIOUT Output voltage load regulation(3) 10 mA ≤ IOUT ≤ 3 A 0.2 %/A
VDO Dropout voltage(4) IOUT = 3 A, TJ = 25°C 240 300 mV
IOUT = 3 A 450
IGND(IN) Quiescent current drawn from VIN supply VOUT = 0.8 V, VBIAS = 3 V
10 mA ≤ IOUT ≤ 3 A
TJ = 25°C		 7 8.5 mA
VOUT = 0.8 V, VBIAS = 3 V
10 mA ≤ IOUT ≤ 3 A		 9
VEN ≤ 0.5 V, TJ = 25°C 1 100 μA
VEN ≤ 0.5 V 300
IGND(BIAS) Quiescent current drawn from VBIAS supply 10 mA ≤ IOUT ≤ 3 A, TJ = 25°C 3 3.8 mA
10 mA ≤ IOUT ≤ 3 A 4.5
VEN ≤ 0.5 V, TJ = 25°C 100 170 μA
VEN ≤ 0.5 V 200
UVLO Undervoltage lockout threshold VBIAS rising until device is functional, TJ = 25°C 2.2 2.45 2.7 V
VBIAS rising until device is functional 2 2.9
UVLO(HYS) Undervoltage lockout hysteresis VBIAS falling from UVLO threshold until device is non-functional
TJ = 25°C		 60 150 300 mV
VBIAS falling from UVLO threshold until device is non-functional 50 350
ISC Output short-circuit current VIN = VOUT(NOM) + 1 V, VBIAS = 3 V, VOUT = 0 V 5.8 A
SOFT-START
rSS Soft-start internal resistance 11 13.5 16 kΩ
tSS Soft-start time
tSS = CSS × rSS × 5		 CSS = 10 nF 675 μs
ENABLE
IEN ENABLE pin current VEN = VBIAS 0.01 μA
VEN = 0 V, VBIAS = 5.5 V, TJ = 25°C –19 –30 –40
VEN = 0 V, VBIAS = 5.5 V –13 –51
VEN(ON) Enable voltage threshold VEN rising until output = ON, TJ = 25°C 1 1.25 1.5 V
VEN rising until output = ON 0.9 1.55
VEN(HYS) Enable voltage hysteresis VEN falling from VEN(ON) until Output = OFF
TJ = 25°C		 50 100 150 mV
VEN falling from VEN(ON) until Output = OFF 30 200
AC PARAMETERS
PSRR
(VIN)		 Ripple rejection for VIN input voltage VIN = VOUT(NOM) + 1 V,
ƒ = 120 Hz		 80 dB
VIN = VOUT(NOM) + 1 V,
ƒ = 1 kHz		 70
PSRR
(VBIAS)		 Ripple rejection for VBIAS voltage VBIAS = VOUT(NOM) + 3 V,
ƒ= 120 Hz		 58
VBIAS = VOUT(NOM) + 3 V,
ƒ = 1 kHz		 58
en Output noise density ƒ = 120 Hz 1 µV/√Hz
Output noise voltage BW = 10 Hz − 100 kHz 150 µVRMS
BW = 300 Hz − 300 kHz 90
THERMAL PARAMETERS
TSD Thermal shutdown junction temperature 160 °C
TSD(HYS) Thermal shutdown hysteresis 10
(1) VIN cannot exceed either VBIAS or 4.5 V, whichever value is lower.
(2) Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
(3) Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load to full load.
(4) Dropout voltage is defined as the input to output voltage differential (VIN – VOUT) where the input voltage is low enough to cause the output voltage to drop 2% from the nominal value.