JAJSAB5 データシート | TI.com

JAJSAB5F December 2006 – November 2016 LP38853

PRODUCTION DATA.

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

KTW|7
- MPSF015
DDA|8
- MPDS092F
NDZ|7
- MMSF005

サーマルパッド・メカニカル・データ

KTW|7
- PPTD278
DDA|8
- PPTD272A

発注情報

6.7 Typical Characteristics

Refer to the 概略回路図. Unless otherwise specified: T_J = 25°C, R1 = 1.4 kΩ, R2 = 1 kΩ, C_FF= 0.01 µF, V_IN = V_OUT(NOM) + 1 V, V_BIAS = 3 V, I_OUT = 10 mA, C_IN = 10-µF ceramic, C_OUT = 10-µF ceramic, C_BIAS = 1-µF ceramic, C_SS = open.

LP38853 20131087.png

Figure 1. BIAS Ground Pin Current (I_GND(BIAS)) vs V_BIAS

LP38853 20131062.png

Figure 3. IN Ground Pin Current vs Temperature

LP38853 20131065.png

Figure 5. Dropout Voltage (V_DO) vs Temperature

LP38853 20131067.png

Figure 7. V_OUT vs Temperature

LP38853 20131068.png

Figure 9. UVLO Thresholds vs Temperature

LP38853 20131076.png

10 nF to 47 nF

Figure 11. V_OUT vs C_SS

LP38853 20131089.png

Figure 13. Enable Pulldown Current (I_EN) vs Temperature

LP38853 20131077.png

Figure 15. V_IN Line Transient Response

LP38853 20131079.png

Figure 17. V_BIAS Line Transient Response

LP38853 20131070.png

Figure 19. V_BIAS PSRR

LP38853 20131069.png

Figure 21. Output Noise

LP38853 20131061.png

Figure 2. BIAS Ground Pin Current (I_GND(BIAS)) vs Temperature

LP38853 20131063.png

Figure 4. Load Regulation vs Temperature

LP38853 20131066.png

Figure 6. Output Current Limit (I_SC) vs Temperature

LP38853 20131072.png

Figure 8. V_OUT vs V_IN

LP38853 20131075.png

Figure 10. Soft-Start R_SS Variation vs Temperature

LP38853 20131088.png

Figure 12. Enable Thresholds (V_EN) vs Temperature

LP38853 20131090.png

Figure 14. Enable Pullup Resistor (R_EN) vs Temperature

LP38853 20131078.png

Figure 16. V_IN Line Transient Response

LP38853 20131080.png

Figure 18. V_BIAS Line Transient Response

LP38853 20131071.png

Figure 20. V_IN PSRR