JAJSCZ4E January   2017  – December 2022 OPA1677 , OPA1678 , OPA1679

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA1677
    5. 6.5 Thermal Information: OPA1678
    6. 6.6 Thermal Information: OPA1679
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Phase Reversal Protection
      2. 7.3.2 Electrical Overstress
      3. 7.3.3 EMI Rejection Ratio (EMIRR)
        1. 7.3.3.1 EMIRR IN+ Test Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Voltage
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Capacitive Loads
    2. 8.2 Typical Applications
      1. 8.2.1 Phantom-Powered Preamplifier for Piezo Contact Microphones
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Supply
          2. 8.2.1.2.2 Input Network
          3. 8.2.1.2.3 Gain
          4. 8.2.1.2.4 Output Network
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Phono Preamplifier for Moving Magnet Cartridges
      3. 8.2.3 Single-Supply Electret Microphone Preamplifier
      4. 8.2.4 Composite Headphone Amplifier
      5. 8.2.5 Differential Line Receiver With AC-Coupled Outputs
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Power Dissipation
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 9.1.1.3 DIP アダプタ評価基板
        4. 9.1.1.4 DIYAMP-EVM
        5. 9.1.1.5 TI のリファレンス・デザイン
        6. 9.1.1.6 フィルタ設計ツール
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

Figure 5-1 OPA1677: D Package, 8-Pin SOIC (Top View)
GUID-94080CA9-28F9-4D96-8719-BC1CB4178FF2-low.gif Figure 5-2 OPA1677: DBV Package, 5-Pin SOT-23 (Top View)
Pin Functions: OPA1677
PIN TYPE DESCRIPTION
NAME NO.
D
(SOIC)		 DBV (SOT-23)
–IN 2 4 Input Inverting input
+IN 3 3 Input Noninverting input
OUT 6 1 Output Output
V– 4 2 Power Negative (lowest) power supply
V+ 7 5 Power Positive (highest) power supply
GUID-B475DB0F-B79E-44F0-A3F1-10E402582FFA-low.gif Figure 5-3 OPA1678: D Package, 8-Pin SOIC and DGK Package, 8-Pin VSSOP (Top View)
GUID-8CC6B519-47A1-422A-813E-E36B7A9DC330-low.gif Figure 5-4 OPA1678: DRG Package, 8-Pin SON With Exposed Thermal Pad (Top View)
Pin Functions: OPA1678
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Inverting input, channel A
+IN A 3 Input Noninverting input, channel A
–IN B 6 Input Inverting input, channel B
+IN B 5 Input Noninverting input, channel B
OUT A 1 Output Output, channel A
OUT B 7 Output Output, channel B
V– 4 Power Negative (lowest) power supply
V+ 8 Power Positive (highest) power supply
Thermal Pad Thermal pad — For DRG (SON-8) package. Exposed thermal die pad on underside. Connect thermal die pad to V–. Solder the thermal pad to improve heat dissipation and provide specified performance.
GUID-765896E2-755C-46E9-9DE1-BED94F3DF093-low.gifFigure 5-5 OPA1679: D Package, 14-Pin SOIC and
PW Package, 14-Pin TSSOP (Top View)
Figure 5-6 OPA1679: RUM Package, 16-Pin QFN With Exposed Thermal Pad (Top View)
Pin Functions: OPA1679
PIN TYPE DESCRIPTION
NAME NO.
D (SOIC)
PW (TSSOP)		 RUM (QFN)
–IN A 2 1 Input Inverting input, channel A
+IN A 3 2 Input Noninverting input, channel A
–IN B 6 5 Input Inverting input, channel B
+IN B 5 4 Input Noninverting input, channel B
–IN C 9 8 Input Inverting input, channel C
+IN C 10 9 Input Noninverting input, channel C
–IN D 13 12 Input Inverting input, channel D
+IN D 12 11 Input Noninverting input, channel D
NC — 13 — No connect
NC — 16 — No connect
OUT A 1 15 Output Output, channel A
OUT B 7 6 Output Output, channel B
OUT C 8 7 Output Output, channel C
OUT D 14 14 Output Output, channel D
V+ 4 3 Power Positive (highest) power supply
V– 11 10 Power Negative (lowest) power supply
Thermal Pad — Thermal pad — Exposed thermal die pad on underside. Connect thermal die pad to V–. Solder the thermal pad to improve heat dissipation and provide specified performance.