JAJSRQ2A October   2023  – February 2024 OPA4990-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Function
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Protection Circuitry
      2. 6.3.2 EMI Rejection
      3. 6.3.3 Thermal Protection
      4. 6.3.4 Capacitive Load and Stability
      5. 6.3.5 Common-Mode Voltage Range
      6. 6.3.6 Phase Reversal Protection
      7. 6.3.7 Electrical Overstress
      8. 6.3.8 Overload Recovery
      9. 6.3.9 Typical Specifications and Distributions
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Low-Side Current Measurement
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Slew Rate Limit for Input Protection
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI (Free Software Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information
    2. 10.2 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|14
サーマルパッド・メカニカル・データ
発注情報

7.2.1.2 Detailed Design Procedure

The transfer function of the circuit in Figure 7-1 is given in Equation 1.

Equation 1. V O U T   = I L O A D ×   R S H U N T × G a i n

The load current (ILOAD) produces a voltage drop across the shunt resistor (RSHUNT). The load current is set from 0 A to 1 A. To keep the shunt voltage below 100 mV at maximum load current, the largest shunt resistor is defined using Equation 2.

Equation 2. R S H U N T   = V S H U N T _ M A X   I L O A D _ M A X   =   100   m V 1   A   =   100   m Ω

Using Equation 2, RSHUNT is calculated to be 100 mΩ. The voltage drop produced by ILOAD and RSHUNT is amplified by the OPA990-Q1 to produce an output voltage of 0V to 4.9V. The gain needed by the OPA990-Q1 to produce the necessary output voltage is calculated using Equation 3.

Equation 3. G a i n   = ( V O U T _ M A X   -   V O U T _ M I N ) ( V I N _ M A X   -   V I N _ M I N )

Using Equation 3, the required gain is calculated to be 49V/V, which is set with resistors RF and RG. Equation 4 is used to size the resistors, RF and RG, to set the gain of the OPA990-Q1 to 49V/V.

Equation 4. G a i n   =   1   +   ( R F ) ( R G )

Choosing RF as 360 kΩ, RG is calculated to be 7.5 kΩ. RF and RG were chosen as 360 kΩ and 7.5 kΩ because they are standard value resistors that create a 49:1 ratio. Other resistors that create a 49:1 ratio can also be used. Figure 7-2 shows the measured transfer function of the circuit shown in Figure 7-1.