JAJSGR5B August   2009  – January 2019 SN74CBTLV1G125-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      アプリケーション回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIK VCC = 3 V, II = –18 mA –1.2 V
II VCC = 3.6 V, VI = VCC or GND ±1 μA
Ioff VCC = 0, VI or VO = 0 to 3.6 V, OE = 3.6 V 15 μA
VCC = 0, VI or VO = 0 to 3.6 V, OE = 0 V 100
ICC VCC = 3.6 V, VI = VCC or GND 10 μA
ΔICC(2) Control inputs VCC = 3.6 V, One input at 3 V, Other inputs at VCC or GND 300 μA
Ci Control inputs VI = 3 V or 0 2.5 pF
Cio(OFF) VO = 3 V or 0, OE = VCC 7 pF
ron(3) VCC = 2.3 V,
TYP at VCC = 2.5 V		 VI = 0 II = 32 mA 7 10 Ω
II = 24 mA 7 10
VI = 1.7 V, II = 15 mA 15 25
VCC = 3 V VI = 0 II = 32 mA 5 7
II = 24 mA 5 7
VI = 2.4 V, II = 15 mA 10 15
(1) All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.
(2) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
(3) Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals.