JAJSN72A November   2021  – February 2022 SN74HCS373-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS 3-State Outputs
      2. 8.3.2 CMOS Schmitt-Trigger Inputs
      3. 8.3.3 Clamp Diode Structure
      4. 8.3.4 Wettable Flanks
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-20211101-SS0I-H99V-RKZ0-CSLVVQZQ3GLN-low.gifPW Package
20-Pin TSSOP
Top View
GUID-20210920-SS0I-WLND-KDXX-NPW0SN2MNFXM-low.gifWRKS package
20-Pin VQFN
Top View
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
OE 1 Input Output enable, active low
1Q 2 Output Output for channel 1
1D 3 Input Input for channel 1
2D 4 Input Input for channel 2
2Q 5 Output Output for channel 2
3Q 6 Output Output for channel 3
3D 7 Input Input for channel 3
4D 8 Input Input for channel 4
4Q 9 Output Output for channel 4
GND 10 — Ground
LE 11 Input Latch enable
5Q 12 Output Output for channel 5
5D 13 Input Input for channel 5
6D 14 Input Input for channel 6
6Q 15 Output Output for channel 6
7Q 16 Output Output for channel 7
7D 17 Input Input for channel 7
8D 18 Input Input for channel 8
8Q 19 Output Output for channel 8
VCC 20 — Postive supply
Thermal Pad(1) — The thermal pad can be connect to GND or left floating. Do not connect to any other signal or supply.
(1) WRKS package only.