JAJSFI3A May 2018 – November 2018 TAS3251
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | DNCP | ||||||
R/W | R/W |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | Reserved | Reserved | ||
6-2 | DNCP | R/W | 0 | NCP Clock Divider – These bits set the source clock divider value for the CP clock. These bits are ignored in clock auto set mode.
0000000: Divide by 1
|
1-0 | R/W | 1 |