JAJSFN8A June   2018  – February 2022 TCA9517-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 I2C Interface Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Two-Channel Bidirectional Buffer
      2. 9.3.2 Active-High Repeater-Enable Input
      3. 9.3.3 VOL B-Side Offset Voltage
      4. 9.3.4 Standard Mode and Fast Mode Support
      5. 9.3.5 Clock Stretching Support
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Clock Stretching Support
        2. 10.2.2.2 VILC and Pullup Resistor Sizing
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.7 I2C Interface Switching Characteristics

VCCB = 2.7 V to 5.25 V, GND = 0 V, TA = –40°C to 125°C (unless otherwise noted)(1) (4)
PARAMETERFROM
(INPUT)		TO
(OUTPUT)		TEST CONDITIONSMINTYP(5)MAXUNIT
tPLZPropagation delaySDAB, SCLB(3) (see Figure 8-4)SDAA, SCLA(3) (see Figure 8-4)141250ns
SDAA, SCLA(2) (see Figure 8-3)SDAB, SCLB(2) (see Figure 8-3)74110
tPZLPropagation delaySDAB, SCLBSDAA, SCLAVCCA ≤ 2.7 V (see Figure 8-2)76(6)110ns
VCCA ≥ 3 V
(see Figure 8-2)		95290
SDAA, SCLA(2) (see Figure 8-3)SDAB, SCLB(2) (see Figure 8-3)107230
tTLHTransition timeB-side to A side80%20%VCCA ≤ 2.7 V
(see Figure 8-3)		12ns
VCCA ≥ 3 V
(see Figure 8-3)		42
A side to B-side
(see Figure 8-2)		125
tTHLTransition timeB-side to A side80%20%VCCA ≤ 2.7 V
(see Figure 8-3)		67(6)200ns
VCCA ≥ 3 V
(see Figure 8-3)		86240
A side to B-side
(see Figure 8-2)		48120
(1) Times are specified with loads of 1.35-kΩ pull-up resistance and 50-pF load capacitance on the B-side. On the A side, for 0.9-V ≤ VCCA ≤ 2.7-V, a 167-Ω pull-up and 57-pF load capacitance. For VCCA ≥ 3.0-V, a 450-Ω pull-up and 57-pF load capacitance. Different load resistance and capacitance alter the RC time constant, thereby changing the propagation delay and transition times.
(2) The proportional delay data from A to B-side is measured at 0.3 VCCA on the A side to 1.5 V on the B-side.
(3) The tPLH delay data from B to A side is measured at 0.4 V on the B-side to 0.5 VCCA on the A side when VCCA is less than 2 V, and 1.5 V on the A side if VCCA is greater than 2 V.
(4) pull-up voltages are VCCA on the A side and VCCB on the B-side.
(5) Typical values were measured with VCCA = VCCB = 3.3 V at TA = 25°C, unless otherwise noted.
(6) Typical value measured with VCCA = 2.7 V at TA = 25°C