JAJS516F データシート | TI.com

JAJS516F september 2010 – march 2023 TLV704

PRODUCTION DATA

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）

DBV|5

サーマルパッド・メカニカル・データ

発注情報

6.5 Typical Characteristics

at operating temperature T_J = 25°C, V_IN = V_OUT(NOM) + 1.0 V or 2.5 V (whichever is greater), I_OUT = 1 mA, C_IN = 1 µF, and C_OUT = 1 µF (unless otherwise noted)

Figure 6-1 Line Regulation for Legacy Chip

Figure 6-3 Load Regulation (V_OUT = 3.3 V) for Legacy Chip

Figure 6-5 Output Voltage vs Junction Temperature for
Legacy Chip

Figure 6-7 Dropout Voltage vs Input Voltage (TLV70433) for Legacy Chip

Figure 6-9 Dropout Voltage vs Output Current for Legacy Chip

Figure 6-11 Ground Current vs Junction Temperature for Legacy Chip

Figure 6-13 Ground Pin Current vs Input Voltage for
Legacy Chip

Figure 6-15 Ground Pin Current vs Load Current for
Legacy Chip

Figure 6-17 Current Limit vs Junction Temperature for
Legacy Chip

Figure 6-19 Output Spectral Noise Density vs Frequency for Legacy Chip

Figure 6-21 Power-Supply Ripple Rejection vs Frequency for Legacy Chip

Figure 6-23 Power-Up, Power-Down for Legacy Chip

Figure 6-25 Line Transient Response for Legacy Chip

Figure 6-27 Load Transient Response for Legacy Chip

Figure 6-29 Line Transient Response for New Chip

Figure 6-2 Line Regulation for New Chip

Figure 6-4 Load Regulation (V_OUT = 3.3 V) for New Chip

Figure 6-6 Output Voltage vs Junction Temperature for
New Chip

Figure 6-8 Dropout Voltage vs Input Voltage (TLV70433) for New Chip

Figure 6-10 Dropout Voltage vs Output Current for New Chip

Figure 6-12 Ground Current vs Junction Temperature for
New Chip

Figure 6-14 Ground Pin Current vs Input Voltage for New Chip

Figure 6-16 Ground Pin Current vs Load Current for New Chip

Figure 6-18 Current Limit vs Junction Temperature for
New Chip

Figure 6-20 Output Spectral Noise Density vs Frequency for New Chip

Figure 6-22 Power-Supply Ripple Rejection vs Frequency for New Chip

Figure 6-24 Power-Up, Power-Down for New Chip

Figure 6-26 Line Transient Response for New Chip

Figure 6-28 Load Transient Response for New Chip

Figure 6-30 Dropout Exit Transient Response for New Chip