JAJSDK4A July   2017  – September 2018 TLV741P


  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
      2.      ドロップアウト電圧と出力電流との関係
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Shutdown
      3. 7.3.3 Foldback Current Limit
      4. 7.3.4 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Capacitor Considerations
      2. 8.1.2 Dropout Voltage
      3. 8.1.3 Transient Response
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 What to Do and What Not to Do
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Examples
    3. 10.3 Power Dissipation
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報



Power Dissipation

The ability to remove heat from the die is different for each package type, presenting different considerations in the printed-circuit-board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in Thermal Information. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves the heat sink effectiveness.

Power dissipation depends on input voltage and load conditions. Power dissipation (PD) can be approximated by the product of the output current times the voltage drop across the output pass element (VIN to VOUT), as shown in Equation 3:

Equation 3. TLV741P tlv741-equation-02.gif

Figure 29 shows the maximum ambient temperature versus the power dissipation of the TLV741P. This figure assumes the device is soldered on a JEDEC standard, high-K layout with no airflow over the board. Actual board thermal impedances vary widely. If the application requires high power dissipation, having a thorough understanding of the board temperature and thermal impedances is helpful to make sure the TLV741P does not operate above a junction temperature of 125°C.

TLV741P D002_SLVS348.gifFigure 29. Maximum Ambient Temperature vs Device Power Dissipation

Estimate junction temperature by using the ΨJT and ΨJB thermal metrics, shown inThermal Information. These metrics are a more accurate representation of the heat transfer characteristics of the die and the package than RθJA. The junction temperature can be estimated with Equation 4:

Equation 4. TLV741P q_new_metrics_bvs066.gif


  • PD is the power dissipation shown by Equation 3,
  • TT is the temperature at the center-top of the device package,
  • TB is the PCB temperature measured 1 mm away from the device package on the PCB surface.


Both TT and TB can be measured on actual application boards using a thermogun (an infrared thermometer).

For more information about measuring TT and TB, see Using New Thermal Metrics , available for download at www.ti.com.