JAJSEA7B September   2017  – February 2020 TMP461-SP

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
    1.     ブロック概略図
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Two-Wire Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Temperature Measurement Data
        1. 7.3.1.1 Standard Binary to Decimal Temperature Data Calculation Example
        2. 7.3.1.2 Standard Decimal to Binary Temperature Data Calculation Example
      2. 7.3.2 Series Resistance Cancellation
      3. 7.3.3 Differential Input Capacitance
      4. 7.3.4 Filtering
      5. 7.3.5 Sensor Fault
      6. 7.3.6 ALERT and THERM Functions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode (SD)
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
        1. 7.5.1.1 Bus Overview
        2. 7.5.1.2 Bus Definitions
        3. 7.5.1.3 Serial Bus Address
        4. 7.5.1.4 Read and Write Operations
        5. 7.5.1.5 Timeout Function
        6. 7.5.1.6 High-Speed Mode
      2. 7.5.2 General-Call Reset
    6. 7.6 Register Map
      1. 7.6.1 Register Information
        1. 7.6.1.1  Pointer Register
        2. 7.6.1.2  Local and Remote Temperature Registers
        3. 7.6.1.3  Status Register
        4. 7.6.1.4  Configuration Register
        5. 7.6.1.5  Conversion Rate Register
        6. 7.6.1.6  One-Shot Start Register
        7. 7.6.1.7  Channel Enable Register
        8. 7.6.1.8  Consecutive ALERT Register
        9. 7.6.1.9  η-Factor Correction Register
        10. 7.6.1.10 Remote Temperature Offset Register
        11. 7.6.1.11 Manufacturer Identification Register
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Radiation Environments
      1. 8.3.1 Single Event Latch-Up
      2. 8.3.2 Single Event Functional Interrupt
      3. 8.3.3 Single Event Upset
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Two-Wire Timing Requirements

At –55°C to 125°C and V+ = 1.7 V to 3.6 V, unless otherwise noted.
FAST MODE HIGH-SPEED MODE UNIT
MIN MAX MIN MAX
f(SCL) SCL operating frequency 0.001 0.4 0.001 2.17 MHz
t(BUF) Bus free time between stop and start condition 1300 160 ns
t(HDSTA) Hold time after repeated start condition.
After this period, the first clock is generated.		 600 160 ns
t(SUSTA) Repeated start condition setup time 600 160 ns
t(SUSTO) Stop condition setup time 600 160 ns
t(HDDAT) Data hold time 0 900 0 150 ns
t(SUDAT) Data setup time 100 40 ns
t(LOW) SCL clock low period 1300 320 ns
t(HIGH) SCL clock high period 600 60 ns
tF – SDA Data fall time 300 130 ns
tF, tR – SCL Clock fall and rise time 300 40 ns
tR Rise time for SCL ≤ 100 kHz   1000 ns

Table 1. Quality Conformance Inspection(1)

SUBGROUP DESCRIPTION TEMPERATURE (°C)
1 Static tests at 25
2 Static tests at 125
3 Static tests at –55
4 Dynamic tests at 25
5 Dynamic tests at 125
6 Dynamic tests at –55
7 Functional tests at 25
8A Functional tests at 125
8B Functional tests at –55
9 Switching tests at 25
10 Switching tests at 125
11 Switching tests at –55
(1) MIL-STD-883, Method 5005 - Group A
TMP461-SP ai_tim_2wire.gifFigure 1. Two-Wire Timing Diagram