JAJSGG9B November   2018  – February 2024 TMUX1108

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (VDD = 5V ±10 %)
    6. 6.6  Electrical Characteristics (VDD = 3.3V ±10 %)
    7. 6.7  Electrical Characteristics (VDD = 2.5V ±10 %), (VSS = –2.5V ±10 %)
    8. 6.8  Electrical Characteristics (VDD = 1.8V ±10 %)
    9. 6.9  Electrical Characteristics (VDD = 1.2V ±10 %)
    10. 6.10 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1  On-Resistance
      2. 7.1.2  Off-Leakage Current
      3. 7.1.3  On-Leakage Current
      4. 7.1.4  Transition Time
      5. 7.1.5  Break-Before-Make Delay
      6. 7.1.6  Turn-On and Turn-Off Time
      7. 7.1.7  Charge Injection
      8. 7.1.8  Off Isolation
      9. 7.1.9  Crosstalk
      10. 7.1.10 Bandwidth
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Rail to Rail Operation
      3. 7.3.3 1.8V Logic Compatible Inputs
      4. 7.3.4 Fail-Safe Logic
      5. 7.3.5 Ultra-low Leakage Current
      6. 7.3.6 Ultra-low Charge Injection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.6 Ultra-low Charge Injection

The TMUX1108 has a transmission gate topology, as shown in Figure 7-13. Any mismatch in the stray capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is opened or closed.

GUID-0040BE35-F6FB-448D-80DC-8147652BDD3F-low.gifFigure 7-13 Transmission Gate Topology

The TMUX1108 has special charge-injection cancellation circuitry that reduces the source-to-drain charge injection to as low as 1pC at VS = 1V as shown in Figure 7-14.

GUID-DD59A3DA-5D29-4E78-B8A6-0D4F7D67BC1F-low.gifFigure 7-14 Charge Injection vs Source or Drain Voltage