JAJSGS2C December   2018  – February 2024 TMUX1119

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics (VDD = 5V ±10 %)
    6. 5.6 Electrical Characteristics (VDD = 3.3V ±10 %)
    7. 5.7 Electrical Characteristics (VDD = 1.8V ±10 %)
    8. 5.8 Electrical Characteristics (VDD = 1.2V ±10 %)
    9.     Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 On-Resistance
    2. 6.2 Off-Leakage Current
    3. 6.3 On-Leakage Current
    4. 6.4 Transition Time
    5. 6.5 Break-Before-Make
    6. 6.6 Charge Injection
    7. 6.7 Off Isolation
    8. 6.8 Crosstalk
    9. 6.9 Bandwidth
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Rail to Rail Operation
      3. 7.3.3 1.8V Logic Compatible Inputs
      4. 7.3.4 Fail-Safe Logic
      5. 7.3.5 Ultra-Low Leakage Current
      6. 7.3.6 Ultra-Low Charge Injection
    4. 7.4 Device Functional Modes
    5. 7.5 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.4 Transition Time

Transition time is defined as the time taken by the output of the device to rise or fall 10% after the address signal has risen or fallen past the logic threshold. The 10% transition measurement is utilized to provide the timing of the device. System level timing can then account for the time constant added from the load resistance and load capacitance. Figure 6-4 shows the setup used to measure transition time, denoted by the symbol tTRANSITION.

GUID-BE980E8E-6CE6-48E2-AE0D-5616FBBA3EF5-low.gifFigure 6-4 Transition-Time Measurement Setup