JAJSHU5B August   2019  – February 2024 TMUX1121 , TMUX1122 , TMUX1123

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics (VDD = 5V ±10 %)
    6. 6.6 Electrical Characteristics (VDD = 3.3V ±10 %)
    7. 6.7 Electrical Characteristics (VDD = 1.8V ±10 %)
    8. 6.8 Electrical Characteristics (VDD = 1.2V ±10 %)
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 On-Resistance
    2. 7.2 Off-Leakage Current
    3. 7.3 On-Leakage Current
    4. 7.4 Transition time
    5. 7.5 Break-Before-Make
    6. 7.6 Charge Injection
    7. 7.7 Off Isolation
    8. 7.8 Channel-to-Channel Crosstalk
    9. 7.9 Bandwidth
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8V Logic Compatible Inputs
      4. 8.3.4 Fail-Safe Logic
      5. 8.3.5 Ultra-Low Leakage Current
      6. 8.3.6 Ultra-Low Charge Injection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Truth Tables
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application - Sample-and-Hold Circuit
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Typical Application - Switched Gain Amplifier
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curve
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DGK|8
サーマルパッド・メカニカル・データ
発注情報

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1) (2) (3)
MIN MAX UNIT
VDD Supply voltage –0.5 6 V
VSEL Logic control input pin voltage (SELx) –0.5 6 V
ISEL Logic control input pin current (SELx) –30 30 mA
VS or VD Source or drain voltage (Sx, Dx) –0.5 VDD+0.5 V
IS or ID (CONT) Source or drain continuous current (Sx, Dx) IDC ± 10%(4) IDC ± 10% (4) mA
IS or ID (PEAK) Source and drain peak current: (1ms period max, 10% duty cycle maximum) (Sx, D) Ipeak ± 10 % (4) Ipeak ± 10%(4) mA
Tstg Storage temperature –65 150 °C
Ptot Total power dissipation(5) 300 mW
TJ Junction temperature 150 °C
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(3) All voltages are with respect to ground, unless otherwise specified.
(4) Refer to Recommended Operating Conditions for IDC and Ipeak ratings
(5) For DGK (VSSOP) package: Ptot derates linearly above TA=88°C by 4.87mW/°C