JAJSHS8F June   2011  – February 2024 TPA6211A1-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
    1.     Pin Functions
    2. 4.1 DAPPER
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Operating Characteristics
    7. 5.7 Dissipation Ratings
    8.     Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Advantages of Fully Differential Amplifiers
      2. 6.3.2 Fully Differential Amplifier Efficiency and Thermal Information
      3. 6.3.3 Differential Output Versus Single-Ended Output
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Differential Input Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Resistors (RI)
          2. 7.2.1.2.2 Bypass Capacitor (CBYPASS) and Start-Up Time
          3. 7.2.1.2.3 Input Capacitor (CI)
          4. 7.2.1.2.4 Band-Pass Filter (RI, CI, and CF)
            1. 7.2.1.2.4.1 Step 1: Low-Pass Filter
            2. 7.2.1.2.4.2 Step 2: High-Pass Filter
            3. 7.2.1.2.4.3 Step 3: Additional Low-Pass Filter
          5. 7.2.1.2.5 Decoupling Capacitor (CS)
          6. 7.2.1.2.6 Using Low-ESR Capacitors
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Other Application Circuits
  9. 8 Power Supply Recommendations
    1. 8.1 Power Supply Decoupling Capacitor
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Community Resources
    3. 10.3 Trademarks
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.3 Differential Output Versus Single-Ended Output

Figure 6-2 shows a Class-AB audio power amplifier (APA) in a fully differential configuration. The TPA6211A1-Q1 amplifier has differential outputs driving both ends of the load. One of several potential benefits to this configuration is power to the load. The differential drive to the speaker means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the voltage swing on the load as compared to a ground-referenced load. Plugging 2 × VO(PP) into the power equation (Equation 14) yields four-times the output power (as the voltage is squared) from the same supply rail and load impedance (see Equation 16 and Equation 17).

Equation 14. GUID-1F22A254-6C27-4BE8-BD9C-79094F7EF1CF-low.gif
Equation 15. GUID-B2C18E06-6C09-4DFF-8861-FE95F66C8100-low.gif
Equation 16. GUID-E55461CA-DDFE-42D0-B1A2-0B7F85357606-low.gif
Equation 17. GUID-DD697B80-FCF1-4768-BD1E-181B58D71716-low.gif
GUID-FAFCCCE7-FBFB-444F-AD3C-B0C73F4AF460-low.gifFigure 6-2 Differential Output Configuration

In a typical automotive application operating at 5 V, bridging raises the power into an 8-Ω speaker from a singled-ended (SE, ground reference) limit of 390 mW to 1.56 W. This is a 6-dB improvement in sound power, or loudness of the sound. In addition to increased power, there are frequency-response concerns. Consider the single-supply SE configuration shown in Figure 6-3. A coupling capacitor (CC) is required to block the DC-offset voltage from the load. This capacitor can be quite large (approximately 33 µF to 1000 µF) so it tends to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance. This frequency-limiting effect is due to the high-pass filter network created with the speaker impedance and the coupling capacitance. This is calculated with Equation 18.

Equation 18. GUID-35F5F407-6127-40CD-9C28-821FFB427816-low.gif

For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the DC offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor.

GUID-A71B87FA-710A-4B49-A860-53F6F4A412CD-low.gifFigure 6-3 Single-Ended Output and Frequency Response

Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces four-times the output power of the SE configuration.