JAJSC54E May   2006  – January 2024 TPS28225

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Output Active Low
      3. 6.3.3 Enable/Power Good
      4. 6.3.4 3-State Input
        1. 6.3.4.1 TPS28225 3-State Exit Mode
        2. 6.3.4.2 External Resistor Interference
      5. 6.3.5 Bootstrap Diode
      6. 6.3.6 Upper and Lower Gate Drivers
      7. 6.3.7 Dead-Time Control
      8. 6.3.8 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Four Phases Driven by TPS28225 Driver
        2. 7.2.2.2 Switching The MOSFETs
        3. 7.2.2.3 List of Materials
      3. 7.2.3 Application Curves
    3. 7.3 System Examples
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.2.2.3 List of Materials

For this specific example see Table 7-2. The component vendors are not limited to those shown in the table below. It should be noted that in this example, the power MOSFET packages were chosen with drains on top. The decoupling capacitors C47, C48, C65, and C66 were chosen to have low profiles. This allows the designer to meet good layout rules and place a heatsink on top of the FETs using an electrically isolated and thermally conductive pad.

Table 7-2 List of Materials
REF DESCOUNTDESCRIPTIONMANUFACTUREPART NUMBER
C47, C48, C65, C664Capacitor, ceramic, 4.7 μF, 16 V, X5R 10%, low profile 0.95 mm, 1206TDKC3216X5R1C475K
C41, C422Capacitor, ceramic, 10 μF, 16 V, X7R 10%, 1206TDKC3216X7R1C106K
C50, C512Capacitor, ceramic, 1000 pF, 50 V, X7R, 10%, 0603StdStd
C231Capacitor, ceramic, 0.22 μF, 16 V, X7R, 10%, 0603StdStd
C25, C49, C713Capacitor, ceramic, 1 μF, 16 V, X7R, 10%, '0603StdStd
L31Inductor, SMT, 0.12 μH, 31 A, 0.36 mΩ, 0.400 x 0.276PulsePA0511-101
Q8, Q92Mosfet, N-channel, VDS 30 V, RDS 2.4 mΩ, ID 45 A, LFPAK-iRenesasRJK0301DPB-I
Q101Mosfet, N-channel, VDS 30 V, RDS 6.2 mΩ, ID 30 A, LFPAK-iRenesasRJK0305DPB-I
R321Resistor, chip, 0 Ω, 1/10 W, 1%, '0805StdStd
R51, R522Resistor, chip, 2.2 Ω, 1/10 W, 1%, '0805StdStd
U71Device, High Frequency 4-A Sink Synchronous Buck MOSFET Driver, DFN-8Texas InstrumentsTPS28225DRB