JAJSOH5D November   2022  – November 2023 TPS389C03-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  I2C
      2. 7.3.2  Maskable Interrupt (AMSK)
      3. 7.3.3  VDD
      4. 7.3.4  MON
      5. 7.3.5  NRST
      6. 7.3.6  NIRQ
      7. 7.3.7  ADC
      8. 7.3.8  Packet Error Checking (PEC)
      9. 7.3.9  Q&A Watchdog
        1. 7.3.9.1 Question and Token Generation
        2. 7.3.9.2 Q&A Watchdog Open and Close Window Delay
        3. 7.3.9.3 Q&A Watchdog Status Register
        4. 7.3.9.4 Q&A Watchdog Timing
        5. 7.3.9.5 Q&A Watchdog State Machine and Test Program
      10. 7.3.10 Error Signal Monitoring (ESM)
        1. 7.3.10.1 ESM Timing
    4. 7.4 Device Functional Modes
      1. 7.4.1 Built-In Self Test and Configuration Load
        1. 7.4.1.1 Notes on BIST Execution
      2. 7.4.2 TPS389C03-Q1 Power ON
  9. 8 Register Maps
    1. 8.1 Registers Overview
      1. 8.1.1 BANK0 Registers
      2. 8.1.2 BANK1 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Automotive Multichannel Sequencer and Monitor
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power Supply Guidelines
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Documentation Support
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.2 Maskable Interrupt (AMSK)

In the case of power up, AMSK_ON register applies. AMSK_ON masks interrupts until the MON voltage crosses the UVLF threshold or sequence timeout expires whichever is sooner. In the case of power down AMSK_OFF register applies. AMSK_ON masks interrupts until the MON voltage is below the OFF threshold and then the OVLF interrupts are active.

Table 7-2 summarizes the auto-mask operation for power up and power down.

Table 7-2 Auto-Mask Operation for the Power Up and Power Down
TRANSITION AUTO-MASK APPLIED AUTO-MASK APPLIES TO AUTO-MASK INACTIVE INTERRUPTS ACTIVE FOR MON CHANNELS NOT IN AUTO-MASK

Power Up

AMSK_ON

IEN_UVLF, IEN_UVHF, IEN_OVHF

 SEQ_TOUT expires or rail crosses UVLF At Power Up

Power Down

 AMSK_OFF Auto-mask active in transition until SEQ_TOUT expires Until SEQ_TOUT expires