JAJSEU4D December   2015  – December 2019 TPS4H160-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーションの回路図
      2.      可変電流制限による容量性負荷の駆動
  4. 改訂履歴
  5. 概要(続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Switching Characteristics
    7. 8.7 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Pin Current and Voltage Conventions
      2. 9.3.2 Accurate Current Sense
      3. 9.3.3 Adjustable Current Limit
      4. 9.3.4 Inductive-Load Switching-Off Clamp
      5. 9.3.5 Fault Detection and Reporting
        1. 9.3.5.1 Diagnostic Enable Function
        2. 9.3.5.2 Multiplexing of Current Sense
        3. 9.3.5.3 Fault Table
        4. 9.3.5.4 STx and FAULT Reporting
      6. 9.3.6 Full Diagnostics
        1. 9.3.6.1 Short-to-GND and Overload Detection
        2. 9.3.6.2 Open-Load Detection
          1. 9.3.6.2.1 Channel On
          2. 9.3.6.2.2 Channel Off
        3. 9.3.6.3 Short-to-Battery Detection
        4. 9.3.6.4 Reverse Polarity Detection
        5. 9.3.6.5 Thermal Fault Detection
          1. 9.3.6.5.1 Thermal Shutdown
      7. 9.3.7 Full Protections
        1. 9.3.7.1 UVLO Protection
        2. 9.3.7.2 Loss-of-GND Protection
        3. 9.3.7.3 Protection for Loss of Power Supply
        4. 9.3.7.4 Reverse-Current Protection
        5. 9.3.7.5 MCU I/O Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Working Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
      1. 12.2.1 Without a GND Network
      2. 12.2.2 With a GND Network
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントの更新通知を受け取る方法
    2. 13.2 コミュニティ・リソース
    3. 13.3 商標
    4. 13.4 静電気放電に関する注意事項
    5. 13.5 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

To prevent thermal shutdown, TJ must be less than 150°C. The HTSSOP package has good thermal impedance. However, the PCB layout is very important. Good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability of the device.

  • Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely important when there are not any heat sinks attached to the PCB on the other side of the package.
  • Add as many thermal vias as possible directly under the package ground pad to optimize the thermal conductivity of the board.
  • All thermal vias should either be plated shut or plugged and capped on both sides of the board to prevent solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.