JAJSGV6 January   2019 TPS54560B

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と負荷電流との関係
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope Compensation Output Current
      3. 7.3.3  Pulse Skip Eco-mode
      4. 7.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Enable and Adjusting Undervoltage Lockout
      8. 7.3.8  Internal Soft Start
      9. 7.3.9  Constant Switching Frequency and Timing Resistor (RT/CLK) pin)
      10. 7.3.10 Accurate Current-Limit Operation and Maximum Switching Frequency
      11. 7.3.11 Synchronization to RT/CLK pin
      12. 7.3.12 Overvoltage Protection
      13. 7.3.13 Thermal Shutdown
      14. 7.3.14 Small Signal Model for Loop Response
      15. 7.3.15 Simple Small Signal Model for Peak-Current-Mode Control
      16. 7.3.16 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with VIN < 4.5 V (Minimum VIN)
      2. 7.4.2 Operation with EN Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design with WEBENCH® Tools
        2. 8.2.2.2  Selecting the Switching Frequency
        3. 8.2.2.3  Output Inductor Selection (LO)
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Catch Diode
        6. 8.2.2.6  Input Capacitor
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  Undervoltage Lockout Setpoint
        9. 8.2.2.9  Output Voltage and Feedback Resistors Selection
        10. 8.2.2.10 Minimum Input Voltage, VIN
        11. 8.2.2.11 Compensation
        12. 8.2.2.12 Discontinuous Conduction Mode and Eco-mode Boundary
        13. 8.2.2.13 Power Dissipation Estimate
        14. 8.2.2.14 Safe Operating Area
      3. 8.2.3 Application Curves
    3. 8.3 Other System Examples
      1. 8.3.1 Inverting Power
      2. 8.3.2 Split-Rail Power Supply
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Estimated Circuit Area
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.13 Power Dissipation Estimate

The following formulas show how to estimate the TPS54560B power dissipation under CCM operation. Do not use these equations if the device is operating in DCM.

The power dissipation of the IC includes conduction loss (PCOND), switching loss (PSW), gate-drive loss (PGD), and supply current (PQ). Example calculations are shown with the 12-V typical input voltage of the design example.

Equation 52. TPS54560B q_50_lvsBN0.gif

spacer

Equation 53. TPS54560B q_51_lvsBN0.gif

spacer

Equation 54. TPS54560B q_52_lvsBN0.gif

spacer

Equation 55. TPS54560B q_pq_lvsb44.gif

where

  • IOUT is the output current (A).
  • RDS(on) is the on-resistance of the high-side MOSFET (Ω)
  • VOUT is the output voltage (V).
  • VIN is the input voltage (V).
  • fsw is the switching frequency (Hz)
  • trise is the SW pin voltage rise time and can be estimated by trise = VIN x 0.16 ns/V + 3 ns
  • QG is the total gate charge of the internal MOSFET
  • IQ is the operating nonswitching supply current

Therefore,

Equation 56. TPS54560B q_54_lvsBN0.gif

For given TA,

Equation 57. TPS54560B q_tj_lvs795.gif

For given TJMAX = 150°C

Equation 58. TPS54560B q_tamax_lvs795.gif

where

  • Ptot is the total device power dissipation (W)
  • TA is the ambient temperature (°C).
  • TJ is the junction temperature (°C).
  • RTH is the thermal resistance of the package (°C/W)
  • TJMAX is maximum junction temperature (°C)
  • TAMAX is maximum ambient temperature (°C).

There will be additional power losses in the regulator circuit due to the inductor ac and dc losses, the catch diode and PCB trace resistance impacting the overall efficiency of the regulator.